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llvm-mc/AsmParser: Disambiguate i64i8imm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78598 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -28,7 +28,9 @@ def i64i32imm_pcrel : Operand<i64> {
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// 64-bits but only 8 bits are significant.
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def i64i8imm : Operand<i64>;
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def i64i8imm : Operand<i64> {
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let ParserMatchClass = ImmSExt8AsmOperand;
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}
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def lea64mem : Operand<i64> {
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let PrintMethod = "printlea64mem";
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@ -1,6 +1,6 @@
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// FIXME: Switch back to FileCheck once we print actual instructions
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// RUN: llvm-mc -triple i386-unknown-unknown %s > %t
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// RUN: llvm-mc -triple x86_64-unknown-unknown %s > %t
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// RUN: grep {MCInst(opcode=.*, operands=.reg:2, reg:0, reg:2.)} %t
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subb %al, %al
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@ -29,4 +29,10 @@
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// RUN: grep {MCInst(opcode=.*, operands=.reg:19, reg:0, val:256.)} %t
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subl $256, %eax
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// FIXME: Check that this matches XOR64ri8
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// RUN: grep {MCInst(opcode=.*, operands=.reg:19, reg:0, val:1.)} %t
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xorq $1, %eax
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// FIXME: Check that this matches XOR64ri32
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// RUN: grep {MCInst(opcode=.*, operands=.reg:19, reg:0, val:256.)} %t
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xorq $256, %eax
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