diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td index 9c2d98b44f7..4be2b74a5eb 100644 --- a/lib/Target/ARM/ARMInstrInfo.td +++ b/lib/Target/ARM/ARMInstrInfo.td @@ -190,6 +190,9 @@ def STRH : InstARM<(ops IntRegs:$src, IntRegs:$addr), def MOV : InstARM<(ops IntRegs:$dst, op_addr_mode1:$src), "mov $dst, $src", [(set IntRegs:$dst, addr_mode1:$src)]>; +def MVN : InstARM<(ops IntRegs:$dst, op_addr_mode1:$src), + "mvn $dst, $src", [(set IntRegs:$dst, (not addr_mode1:$src))]>; + def ADD : Addr1BinOp<"add", add>; def ADCS : Addr1BinOp<"adcs", adde>; def ADDS : Addr1BinOp<"adds", addc>; diff --git a/test/CodeGen/ARM/mvn.ll b/test/CodeGen/ARM/mvn.ll new file mode 100644 index 00000000000..fc788b80fdc --- /dev/null +++ b/test/CodeGen/ARM/mvn.ll @@ -0,0 +1,55 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm && +; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep mvn | wc -l | grep 4 + +;int %f1() { +;entry: +; ret int -1 +;} + +int %f2(int %a) { +entry: + %tmpnot = xor int %a, -1 ; [#uses=1] + ret int %tmpnot +} + +;int %f3(int %a) { +;entry: +; %tmp1 = shl int %a, ubyte 2 ; [#uses=1] +; %tmp1not = xor int %tmp1, -1 ; [#uses=1] +; ret int %tmp1not +;} + +int %f4(int %a, ubyte %b) { +entry: + %tmp3 = shl int %a, ubyte %b ; [#uses=1] + %tmp3not = xor int %tmp3, -1 ; [#uses=1] + ret int %tmp3not +} + +;uint %f5(uint %a) { +;entry: +; %tmp1 = lshr uint %a, ubyte 2 ; [#uses=1] +; %tmp1not = xor uint %tmp1, 4294967295 ; [#uses=1] +; ret uint %tmp1not +;} + +uint %f6(uint %a, ubyte %b) { +entry: + %tmp2 = lshr uint %a, ubyte %b ; [#uses=1] + %tmp2not = xor uint %tmp2, 4294967295 ; [#uses=1] + ret uint %tmp2not +} + +;int %f7(int %a) { +;entry: +; %tmp1 = ashr int %a, ubyte 2 ; [#uses=1] +; %tmp1not = xor int %tmp1, -1 ; [#uses=1] +; ret int %tmp1not +;} + +int %f8(int %a, ubyte %b) { +entry: + %tmp3 = ashr int %a, ubyte %b ; [#uses=1] + %tmp3not = xor int %tmp3, -1 ; [#uses=1] + ret int %tmp3not +}