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Swap fp comparison operands and change predicate to allow load folding (safely this time).

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55553 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng
2008-08-29 23:22:12 +00:00
parent 97af60b3ae
commit 456704476f
2 changed files with 51 additions and 17 deletions
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66
lib/Target/X86/X86ISelLowering.cpp
View File

@ -1909,7 +1909,6 @@ SDValue X86TargetLowering::getReturnAddressFrameIndex(SelectionDAG &DAG) {
} }
/// translateX86CC - do a one to one translation of a ISD::CondCode to the X86 /// translateX86CC - do a one to one translation of a ISD::CondCode to the X86
/// specific condition code. It returns a false if it cannot do a direct /// specific condition code. It returns a false if it cannot do a direct
/// translation. X86CC is the translated CondCode. LHS/RHS are modified as /// translation. X86CC is the translated CondCode. LHS/RHS are modified as
@ -1951,36 +1950,71 @@ static bool translateX86CC(ISD::CondCode SetCCOpcode, bool isFP,
case ISD::SETUGE: X86CC = X86::COND_AE; break; case ISD::SETUGE: X86CC = X86::COND_AE; break;
} }
} else { } else {
// First determine if it requires or is profitable to flip the operands.
bool Flip = false;
switch (SetCCOpcode) {
default: break;
case ISD::SETOLT:
case ISD::SETOLE:
case ISD::SETUGT:
case ISD::SETUGE:
Flip = true;
break;
}
// If LHS is a foldable load, but RHS is not, flip the condition.
if (!Flip &&
(ISD::isNON_EXTLoad(LHS.getNode()) && LHS.hasOneUse()) &&
!(ISD::isNON_EXTLoad(RHS.getNode()) && RHS.hasOneUse())) {
SetCCOpcode = getSetCCSwappedOperands(SetCCOpcode);
Flip = true;
}
if (Flip)
std::swap(LHS, RHS);
// On a floating point condition, the flags are set as follows: // On a floating point condition, the flags are set as follows:
// ZF PF CF op // ZF PF CF op
// 0 | 0 | 0 | X > Y // 0 | 0 | 0 | X > Y
// 0 | 0 | 1 | X < Y // 0 | 0 | 1 | X < Y
// 1 | 0 | 0 | X == Y // 1 | 0 | 0 | X == Y
// 1 | 1 | 1 | unordered // 1 | 1 | 1 | unordered
bool Flip = false;
switch (SetCCOpcode) { switch (SetCCOpcode) {
default: break; default: break;
case ISD::SETUEQ: case ISD::SETUEQ:
case ISD::SETEQ: X86CC = X86::COND_E; break; case ISD::SETEQ:
case ISD::SETOLT: Flip = true; // Fallthrough X86CC = X86::COND_E;
break;
case ISD::SETOLT: // flipped
case ISD::SETOGT: case ISD::SETOGT:
case ISD::SETGT: X86CC = X86::COND_A; break; case ISD::SETGT:
case ISD::SETOLE: Flip = true; // Fallthrough X86CC = X86::COND_A;
break;
case ISD::SETOLE: // flipped
case ISD::SETOGE: case ISD::SETOGE:
case ISD::SETGE: X86CC = X86::COND_AE; break; case ISD::SETGE:
case ISD::SETUGT: Flip = true; // Fallthrough X86CC = X86::COND_AE;
break;
case ISD::SETUGT: // flipped
case ISD::SETULT: case ISD::SETULT:
case ISD::SETLT: X86CC = X86::COND_B; break; case ISD::SETLT:
case ISD::SETUGE: Flip = true; // Fallthrough X86CC = X86::COND_B;
break;
case ISD::SETUGE: // flipped
case ISD::SETULE: case ISD::SETULE:
case ISD::SETLE: X86CC = X86::COND_BE; break; case ISD::SETLE:
X86CC = X86::COND_BE;
break;
case ISD::SETONE: case ISD::SETONE:
case ISD::SETNE: X86CC = X86::COND_NE; break; case ISD::SETNE:
case ISD::SETUO: X86CC = X86::COND_P; break; X86CC = X86::COND_NE;
case ISD::SETO: X86CC = X86::COND_NP; break; break;
case ISD::SETUO:
X86CC = X86::COND_P;
break;
case ISD::SETO:
X86CC = X86::COND_NP;
break;
} }
if (Flip)
std::swap(LHS, RHS);
} }
return X86CC != X86::COND_INVALID; return X86CC != X86::COND_INVALID;

2
test/CodeGen/X86/cmp2.ll
View File

@ -3,7 +3,7 @@
define i32 @test(double %A) nounwind { define i32 @test(double %A) nounwind {
entry: entry:
%tmp2 = fcmp ogt double %A, 1.500000e+02; <i1> [#uses=1] %tmp2 = fcmp ogt double %A, 1.500000e+02; <i1> [#uses=1]
%tmp5 = fcmp olt double %A, 7.500000e+01; <i1> [#uses=1] %tmp5 = fcmp ult double %A, 7.500000e+01; <i1> [#uses=1]
%bothcond = or i1 %tmp2, %tmp5; <i1> [#uses=1] %bothcond = or i1 %tmp2, %tmp5; <i1> [#uses=1]
br i1 %bothcond, label %bb8, label %bb12 br i1 %bothcond, label %bb8, label %bb12