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Remove special handling of implicit_def. Fix a couple more bugs in liveintervalanalysis and coalescer handling of implicit_def.

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Note, isUndef marker must be placed even on implicit_def def operand or else the scavenger will not ignore it. This is necessary because -O0 path does not use liveintervalanalysis, it treats implicit_def just like any other def.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74601 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng
2009-07-01 08:19:36 +00:00
parent d6bb283de9
commit 459a7c6b6a
5 changed files with 175 additions and 64 deletions
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15
include/llvm/CodeGen/RegisterScavenging.h
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@@ -69,10 +69,6 @@ class RegScavenger {
/// available, unset means the register is currently being used.
BitVector RegsAvailable;
/// ImplicitDefed - If bit is set that means the register is defined by an
/// implicit_def instructions. That means it can be clobbered at will.
BitVector ImplicitDefed;
/// CurrDist - Distance from MBB entry to the current instruction MBBI.
///
unsigned CurrDist;
@@ -117,25 +113,18 @@ public:
bool isUsed(unsigned Reg) const { return !RegsAvailable[Reg]; }
bool isUnused(unsigned Reg) const { return RegsAvailable[Reg]; }
bool isImplicitlyDefined(unsigned Reg) const { return ImplicitDefed[Reg]; }
/// getRegsUsed - return all registers currently in use in used.
void getRegsUsed(BitVector &used, bool includeReserved);
/// setUsed / setUnused - Mark the state of one or a number of registers.
///
void setUsed(unsigned Reg, bool ImpDef = false);
void setUsed(BitVector &Regs, bool ImpDef = false) {
void setUsed(unsigned Reg);
void setUsed(BitVector &Regs) {
RegsAvailable &= ~Regs;
if (ImpDef)
ImplicitDefed |= Regs;
else
ImplicitDefed &= ~Regs;
}
void setUnused(unsigned Reg, const MachineInstr *MI);
void setUnused(BitVector &Regs) {
RegsAvailable |= Regs;
ImplicitDefed &= ~Regs;
}
/// FindUnusedReg - Find a unused register of the specified register class