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Add titles to the various SelectionDAG viewGraph calls
that include useful information like the name of the block being viewed and the current phase of compilation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53872 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -84,7 +84,8 @@ public:
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/// viewGraph - Pop up a GraphViz/gv window with the DAG rendered using 'dot'.
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///
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void viewGraph();
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void viewGraph(const std::string &Title);
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void viewGraph() { return viewGraph(""); }
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#ifndef NDEBUG
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std::map<const SDNode *, std::string> NodeGraphAttrs;
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@ -59,7 +59,7 @@ public:
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virtual void EmitFunctionEntryCode(Function &Fn, MachineFunction &MF) {}
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virtual void InstructionSelect(SelectionDAG &SD) = 0;
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virtual void InstructionSelectPostProcessing(SelectionDAG &DAG) {}
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virtual void InstructionSelectPostProcessing() {}
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virtual void SelectRootInit() {
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DAGSize = CurDAG->AssignTopologicalOrder(TopOrder);
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@ -37,20 +37,6 @@ STATISTIC(PreIndexedNodes , "Number of pre-indexed nodes created");
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STATISTIC(PostIndexedNodes, "Number of post-indexed nodes created");
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namespace {
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#ifndef NDEBUG
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static cl::opt<bool>
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ViewDAGCombine1("view-dag-combine1-dags", cl::Hidden,
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cl::desc("Pop up a window to show dags before the first "
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"dag combine pass"));
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static cl::opt<bool>
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ViewDAGCombine2("view-dag-combine2-dags", cl::Hidden,
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cl::desc("Pop up a window to show dags before the second "
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"dag combine pass"));
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#else
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static const bool ViewDAGCombine1 = false;
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static const bool ViewDAGCombine2 = false;
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#endif
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static cl::opt<bool>
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CombinerAA("combiner-alias-analysis", cl::Hidden,
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cl::desc("Turn on alias analysis during testing"));
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@ -5662,10 +5648,6 @@ SDOperand DAGCombiner::FindBetterChain(SDNode *N, SDOperand OldChain) {
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// SelectionDAG::Combine - This is the entry point for the file.
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//
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void SelectionDAG::Combine(bool RunningAfterLegalize, AliasAnalysis &AA) {
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if (!RunningAfterLegalize && ViewDAGCombine1)
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viewGraph();
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if (RunningAfterLegalize && ViewDAGCombine2)
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viewGraph();
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/// run - This is the main entry point to this class.
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///
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DAGCombiner(*this, AA).Run(RunningAfterLegalize);
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@ -35,14 +35,6 @@
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#include <map>
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using namespace llvm;
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#ifndef NDEBUG
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static cl::opt<bool>
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ViewLegalizeDAGs("view-legalize-dags", cl::Hidden,
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cl::desc("Pop up a window to show dags before legalize"));
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#else
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static const bool ViewLegalizeDAGs = 0;
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#endif
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//===----------------------------------------------------------------------===//
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/// SelectionDAGLegalize - This takes an arbitrary SelectionDAG as input and
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/// hacks on it until the target machine can handle it. This involves
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@ -7039,8 +7031,6 @@ SDOperand SelectionDAGLegalize::ScalarizeVectorOp(SDOperand Op) {
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// SelectionDAG::Legalize - This is the entry point for the file.
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//
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void SelectionDAG::Legalize() {
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if (ViewLegalizeDAGs) viewGraph();
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/// run - This is the main entry point to this class.
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///
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SelectionDAGLegalize(*this).LegalizeDAG();
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@ -19,15 +19,6 @@
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#include "llvm/Target/TargetData.h"
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using namespace llvm;
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#ifndef NDEBUG
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static cl::opt<bool>
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ViewLegalizeTypesDAGs("view-legalize-types-dags", cl::Hidden,
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cl::desc("Pop up a window to show dags before legalize types"));
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#else
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static const bool ViewLegalizeTypesDAGs = 0;
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#endif
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/// run - This is the main entry point for the type legalizer. This does a
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/// top-down traversal of the dag, legalizing types as it goes.
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void DAGTypeLegalizer::run() {
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@ -673,7 +664,5 @@ void DAGTypeLegalizer::GetSplitDestVTs(MVT InVT, MVT &LoVT, MVT &HiVT) {
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/// Note that this is an involved process that may invalidate pointers into
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/// the graph.
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void SelectionDAG::LegalizeTypes() {
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if (ViewLegalizeTypesDAGs) viewGraph();
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DAGTypeLegalizer(*this).run();
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}
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@ -57,6 +57,20 @@ EnableLegalizeTypes("enable-legalize-types", cl::Hidden);
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#ifndef NDEBUG
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static cl::opt<bool>
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ViewDAGCombine1("view-dag-combine1-dags", cl::Hidden,
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cl::desc("Pop up a window to show dags before the first "
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"dag combine pass"));
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static cl::opt<bool>
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ViewLegalizeTypesDAGs("view-legalize-types-dags", cl::Hidden,
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cl::desc("Pop up a window to show dags before legalize types"));
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static cl::opt<bool>
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ViewLegalizeDAGs("view-legalize-dags", cl::Hidden,
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cl::desc("Pop up a window to show dags before legalize"));
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static cl::opt<bool>
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ViewDAGCombine2("view-dag-combine2-dags", cl::Hidden,
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cl::desc("Pop up a window to show dags before the second "
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"dag combine pass"));
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static cl::opt<bool>
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ViewISelDAGs("view-isel-dags", cl::Hidden,
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cl::desc("Pop up a window to show isel dags as they are selected"));
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static cl::opt<bool>
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@ -66,7 +80,11 @@ static cl::opt<bool>
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ViewSUnitDAGs("view-sunit-dags", cl::Hidden,
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cl::desc("Pop up a window to show SUnit dags after they are processed"));
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#else
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static const bool ViewISelDAGs = 0, ViewSchedDAGs = 0, ViewSUnitDAGs = 0;
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static const bool ViewDAGCombine1 = false,
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ViewLegalizeTypesDAGs = false, ViewLegalizeDAGs = false,
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ViewDAGCombine2 = false,
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ViewISelDAGs = false, ViewSchedDAGs = false,
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ViewSUnitDAGs = false;
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#endif
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//===---------------------------------------------------------------------===//
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@ -5282,9 +5300,19 @@ void SelectionDAGISel::ComputeLiveOutVRegInfo(SelectionDAG &DAG) {
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}
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void SelectionDAGISel::CodeGenAndEmitDAG(SelectionDAG &DAG) {
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DOUT << "Lowered selection DAG:\n";
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std::string GroupName;
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if (TimePassesIsEnabled)
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GroupName = "Instruction Selection and Scheduling";
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std::string BlockName;
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if (ViewDAGCombine1 || ViewLegalizeTypesDAGs || ViewLegalizeDAGs ||
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ViewDAGCombine2 || ViewISelDAGs || ViewSchedDAGs || ViewSUnitDAGs)
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BlockName = DAG.getMachineFunction().getFunction()->getName() + ':' +
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BB->getBasicBlock()->getName();
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DOUT << "Initial selection DAG:\n";
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DEBUG(DAG.dump());
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std::string GroupName = "Instruction Selection and Scheduling";
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if (ViewDAGCombine1) DAG.viewGraph("dag-combine1 input for " + BlockName);
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// Run the DAG combiner in pre-legalize mode.
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if (TimePassesIsEnabled) {
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@ -5300,10 +5328,24 @@ void SelectionDAGISel::CodeGenAndEmitDAG(SelectionDAG &DAG) {
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// Second step, hack on the DAG until it only uses operations and types that
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// the target supports.
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if (EnableLegalizeTypes) {// Enable this some day.
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DAG.LegalizeTypes();
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if (ViewLegalizeTypesDAGs) DAG.viewGraph("legalize-types input for " +
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BlockName);
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if (TimePassesIsEnabled) {
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NamedRegionTimer T("Type Legalization", GroupName);
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DAG.LegalizeTypes();
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} else {
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DAG.LegalizeTypes();
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}
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DOUT << "Type-legalized selection DAG:\n";
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DEBUG(DAG.dump());
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// TODO: enable a dag combine pass here.
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}
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if (ViewLegalizeDAGs) DAG.viewGraph("legalize input for " + BlockName);
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if (TimePassesIsEnabled) {
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NamedRegionTimer T("DAG Legalization", GroupName);
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DAG.Legalize();
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@ -5314,6 +5356,8 @@ void SelectionDAGISel::CodeGenAndEmitDAG(SelectionDAG &DAG) {
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DOUT << "Legalized selection DAG:\n";
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DEBUG(DAG.dump());
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if (ViewDAGCombine2) DAG.viewGraph("dag-combine2 input for " + BlockName);
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// Run the DAG combiner in post-legalize mode.
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if (TimePassesIsEnabled) {
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NamedRegionTimer T("DAG Combining 2", GroupName);
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@ -5325,7 +5369,7 @@ void SelectionDAGISel::CodeGenAndEmitDAG(SelectionDAG &DAG) {
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DOUT << "Optimized legalized selection DAG:\n";
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DEBUG(DAG.dump());
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if (ViewISelDAGs) DAG.viewGraph();
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if (ViewISelDAGs) DAG.viewGraph("isel input for " + BlockName);
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if (!FastISel && EnableValueProp)
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ComputeLiveOutVRegInfo(DAG);
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@ -5339,6 +5383,11 @@ void SelectionDAGISel::CodeGenAndEmitDAG(SelectionDAG &DAG) {
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InstructionSelect(DAG);
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}
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DOUT << "Selected selection DAG:\n";
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DEBUG(DAG.dump());
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if (ViewSchedDAGs) DAG.viewGraph("scheduler input for " + BlockName);
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// Schedule machine code.
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ScheduleDAG *Scheduler;
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if (TimePassesIsEnabled) {
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@ -5348,6 +5397,8 @@ void SelectionDAGISel::CodeGenAndEmitDAG(SelectionDAG &DAG) {
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Scheduler = Schedule(DAG);
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}
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if (ViewSUnitDAGs) Scheduler->viewGraph();
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// Emit machine code to BB. This can change 'BB' to the last block being
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// inserted into.
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if (TimePassesIsEnabled) {
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@ -5368,9 +5419,9 @@ void SelectionDAGISel::CodeGenAndEmitDAG(SelectionDAG &DAG) {
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// Perform target specific isel post processing.
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if (TimePassesIsEnabled) {
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NamedRegionTimer T("Instruction Selection Post Processing", GroupName);
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InstructionSelectPostProcessing(DAG);
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InstructionSelectPostProcessing();
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} else {
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InstructionSelectPostProcessing(DAG);
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InstructionSelectPostProcessing();
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}
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DOUT << "Selected machine code:\n";
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@ -5619,8 +5670,6 @@ void SelectionDAGISel::SelectBasicBlock(BasicBlock *LLVMBB, MachineFunction &MF,
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/// target node in the graph.
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///
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ScheduleDAG *SelectionDAGISel::Schedule(SelectionDAG &DAG) {
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if (ViewSchedDAGs) DAG.viewGraph();
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RegisterScheduler::FunctionPassCtor Ctor = RegisterScheduler::getDefault();
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if (!Ctor) {
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@ -5631,7 +5680,6 @@ ScheduleDAG *SelectionDAGISel::Schedule(SelectionDAG &DAG) {
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ScheduleDAG *Scheduler = Ctor(this, &DAG, BB, FastISel);
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Scheduler->Run();
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if (ViewSUnitDAGs) Scheduler->viewGraph();
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return Scheduler;
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}
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@ -215,10 +215,11 @@ std::string DOTGraphTraits<SelectionDAG*>::getNodeLabel(const SDNode *Node,
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/// viewGraph - Pop up a ghostview window with the reachable parts of the DAG
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/// rendered using 'dot'.
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///
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void SelectionDAG::viewGraph() {
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void SelectionDAG::viewGraph(const std::string &Title) {
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// This code is only for debugging!
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#ifndef NDEBUG
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ViewGraph(this, "dag." + getMachineFunction().getFunction()->getName());
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ViewGraph(this, "dag." + getMachineFunction().getFunction()->getName(),
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Title);
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#else
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cerr << "SelectionDAG::viewGraph is only available in debug builds on "
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<< "systems with Graphviz or gv!\n";
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@ -348,7 +349,9 @@ std::string DOTGraphTraits<ScheduleDAG*>::getNodeLabel(const SUnit *SU,
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void ScheduleDAG::viewGraph() {
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// This code is only for debugging!
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#ifndef NDEBUG
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ViewGraph(this, "dag." + DAG.getMachineFunction().getFunction()->getName());
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ViewGraph(this, "dag." + MF->getFunction()->getName(),
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"Scheduling-Units Graph for " + MF->getFunction()->getName() + ':' +
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BB->getBasicBlock()->getName());
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#else
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cerr << "ScheduleDAG::viewGraph is only available in debug builds on "
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<< "systems with Graphviz or gv!\n";
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/// InstructionSelectPostProcessing - Post processing of selected and
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/// scheduled basic blocks.
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virtual void InstructionSelectPostProcessing(SelectionDAG &DAG);
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virtual void InstructionSelectPostProcessing();
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virtual void EmitFunctionEntryCode(Function &Fn, MachineFunction &MF);
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@ -580,7 +580,7 @@ void X86DAGToDAGISel::InstructionSelect(SelectionDAG &DAG) {
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DAG.RemoveDeadNodes();
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}
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void X86DAGToDAGISel::InstructionSelectPostProcessing(SelectionDAG &DAG) {
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void X86DAGToDAGISel::InstructionSelectPostProcessing() {
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// If we are emitting FP stack code, scan the basic block to determine if this
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// block defines any FP values. If so, put an FP_REG_KILL instruction before
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// the terminator of the block.
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