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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75991 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Anton Korobeynikov 2009-07-16 14:10:35 +00:00
parent 1ed1e3ecd4
commit 4656760d9c
1 changed files with 2 additions and 2 deletions
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4
lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
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@ -312,7 +312,7 @@ bool SystemZDAGToDAGISel::MatchAddressBase(SDValue N,
SystemZRRIAddressMode &AM) {
// Is the base register already occupied?
if (AM.BaseType != SystemZRRIAddressMode::RegBase || AM.Base.Reg.getNode()) {
// If so, check to see if the scale register is set.
// If so, check to see if the index register is set.
if (AM.IndexReg.getNode() == 0 && !AM.isRI) {
AM.IndexReg = N;
return false;
@ -439,7 +439,7 @@ bool SystemZDAGToDAGISel::SelectAddrRI(SDValue Op, SDValue& Addr,
/// index register plus an unsigned 12-bit displacement [base + idx + imm].
bool SystemZDAGToDAGISel::SelectAddrRRI12(SDValue Op, SDValue Addr,
SDValue &Base, SDValue &Disp, SDValue &Index) {
SystemZRRIAddressMode AM20(/*isRI*/true), AM12(/*isRI*/true);
SystemZRRIAddressMode AM20, AM12;
bool Done = false;
if (!Addr.hasOneUse()) {