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v4i64 and v8i64 are only synthesizable when NEON is available.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103855 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng
2010-05-15 02:20:21 +00:00
parent 06b666c705
commit 4782b1e2ca
1 changed files with 6 additions and 4 deletions
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10
lib/Target/ARM/ARMISelLowering.cpp
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@@ -585,10 +585,12 @@ TargetRegisterClass *ARMTargetLowering::getRegClassFor(EVT VT) const {
// Map v4i64 to QQ registers but do not make the type legal. Similarly map // Map v4i64 to QQ registers but do not make the type legal. Similarly map
// v8i64 to QQQQ registers. v4i64 and v8i64 are only used for REG_SEQUENCE to // v8i64 to QQQQ registers. v4i64 and v8i64 are only used for REG_SEQUENCE to
// load / store 4 to 8 consecutive D registers. // load / store 4 to 8 consecutive D registers.
if (VT == MVT::v4i64) if (Subtarget->hasNEON()) {
return ARM::QQPRRegisterClass; if (VT == MVT::v4i64)
else if (VT == MVT::v8i64) return ARM::QQPRRegisterClass;
return ARM::QQQQPRRegisterClass; else if (VT == MVT::v8i64)
return ARM::QQQQPRRegisterClass;
}
return TargetLowering::getRegClassFor(VT); return TargetLowering::getRegClassFor(VT);
} }