6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-01-19 20:34:38 +00:00
Code Issues Projects Releases Wiki Activity

R600: Fix a potential iterator invalidation issue.

Browse Source 
As a bonus this reduces the loop from O(n^2) to O(n).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183532 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Benjamin Kramer 2013-06-07 16:13:49 +00:00
parent 74f03455e5
commit 47b0c0a9a0
1 changed files with 3 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
lib/Target/R600/R600OptimizeVectorRegisters.cpp
View File

@ -198,11 +198,9 @@ MachineInstr *R600VectorRegMerger::RebuildVector(
.addReg(SubReg) .addReg(SubReg)
.addImm(Chan); .addImm(Chan);
UpdatedRegToChan[SubReg] = Chan; UpdatedRegToChan[SubReg] = Chan;
for (std::vector<unsigned>::iterator RemoveIt = UpdatedUndef.begin(), UpdatedUndef.erase(
RemoveE = UpdatedUndef.end(); RemoveIt != RemoveE; ++ RemoveIt) { std::remove(UpdatedUndef.begin(), UpdatedUndef.end(), Chan),
if (*RemoveIt == Chan) UpdatedUndef.end());
UpdatedUndef.erase(RemoveIt);
}
DEBUG(dbgs() << " ->"; Tmp->dump();); DEBUG(dbgs() << " ->"; Tmp->dump(););
(void)Tmp; (void)Tmp;
SrcVec = DstReg; SrcVec = DstReg;