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AArch64: Add debug message for large shift constants.

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As requested in code review.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230517 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Matthias Braun 2015-02-25 18:03:50 +00:00
parent d2c64e2df9
commit 47df9cd61b
1 changed files with 8 additions and 2 deletions
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10
lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
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@ -1399,8 +1399,11 @@ static bool isBitfieldExtractOpFromAnd(SelectionDAG *CurDAG, SDNode *N,
// Bail out on large immediates. This happens when no proper
// combining/constant folding was performed.
if (!BiggerPattern && (Srl_imm <= 0 || Srl_imm >= VT.getSizeInBits()))
if (!BiggerPattern && (Srl_imm <= 0 || Srl_imm >= VT.getSizeInBits())) {
DEBUG((dbgs() << N
<< ": Found large shift immediate, this should not happen\n"));
return false;
}
LSB = Srl_imm;
MSB = Srl_imm + (VT == MVT::i32 ? countTrailingOnes<uint32_t>(And_imm)
@ -1506,8 +1509,11 @@ static bool isBitfieldExtractOpFromShr(SDNode *N, unsigned &Opc, SDValue &Opd0,
// Missing combines/constant folding may have left us with strange
// constants.
if (Shl_imm >= VT.getSizeInBits())
if (Shl_imm >= VT.getSizeInBits()) {
DEBUG((dbgs() << N
<< ": Found large shift immediate, this should not happen\n"));
return false;
}
uint64_t Srl_imm = 0;
if (!isIntImmediate(N->getOperand(1), Srl_imm))