[mips] Refactor calls to setCanHaveModuleDir.

Summary:
Moved some calls to setCanHaveModuleDir to the MipsTargetStreamer base class and removed the resulting empty functions from the MipsTargetELFStreamer class.

Also fixed a missing call to setCanHaveModuleDir in MipsTargetELFStreamer::emitDirectiveSetMicroMips.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: tomatabacu

Differential Revision: http://reviews.llvm.org/D4781

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215542 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Toma Tabacu
2014-08-13 12:48:12 +00:00
parent adc58a657b
commit 48017d1bcd
2 changed files with 55 additions and 133 deletions

View File

@ -35,15 +35,21 @@ MipsTargetStreamer::MipsTargetStreamer(MCStreamer &S)
void MipsTargetStreamer::emitDirectiveSetMicroMips() {} void MipsTargetStreamer::emitDirectiveSetMicroMips() {}
void MipsTargetStreamer::emitDirectiveSetNoMicroMips() {} void MipsTargetStreamer::emitDirectiveSetNoMicroMips() {}
void MipsTargetStreamer::emitDirectiveSetMips16() {} void MipsTargetStreamer::emitDirectiveSetMips16() {}
void MipsTargetStreamer::emitDirectiveSetNoMips16() {} void MipsTargetStreamer::emitDirectiveSetNoMips16() {
void MipsTargetStreamer::emitDirectiveSetReorder() {} setCanHaveModuleDir(false);
}
void MipsTargetStreamer::emitDirectiveSetReorder() {
setCanHaveModuleDir(false);
}
void MipsTargetStreamer::emitDirectiveSetNoReorder() {} void MipsTargetStreamer::emitDirectiveSetNoReorder() {}
void MipsTargetStreamer::emitDirectiveSetMacro() {} void MipsTargetStreamer::emitDirectiveSetMacro() { setCanHaveModuleDir(false); }
void MipsTargetStreamer::emitDirectiveSetNoMacro() {} void MipsTargetStreamer::emitDirectiveSetNoMacro() {
setCanHaveModuleDir(false);
}
void MipsTargetStreamer::emitDirectiveSetMsa() { setCanHaveModuleDir(false); } void MipsTargetStreamer::emitDirectiveSetMsa() { setCanHaveModuleDir(false); }
void MipsTargetStreamer::emitDirectiveSetNoMsa() { setCanHaveModuleDir(false); } void MipsTargetStreamer::emitDirectiveSetNoMsa() { setCanHaveModuleDir(false); }
void MipsTargetStreamer::emitDirectiveSetAt() {} void MipsTargetStreamer::emitDirectiveSetAt() { setCanHaveModuleDir(false); }
void MipsTargetStreamer::emitDirectiveSetNoAt() {} void MipsTargetStreamer::emitDirectiveSetNoAt() { setCanHaveModuleDir(false); }
void MipsTargetStreamer::emitDirectiveEnd(StringRef Name) {} void MipsTargetStreamer::emitDirectiveEnd(StringRef Name) {}
void MipsTargetStreamer::emitDirectiveEnt(const MCSymbol &Symbol) {} void MipsTargetStreamer::emitDirectiveEnt(const MCSymbol &Symbol) {}
void MipsTargetStreamer::emitDirectiveAbiCalls() {} void MipsTargetStreamer::emitDirectiveAbiCalls() {}
@ -56,18 +62,30 @@ void MipsTargetStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
void MipsTargetStreamer::emitMask(unsigned CPUBitmask, int CPUTopSavedRegOff) {} void MipsTargetStreamer::emitMask(unsigned CPUBitmask, int CPUTopSavedRegOff) {}
void MipsTargetStreamer::emitFMask(unsigned FPUBitmask, int FPUTopSavedRegOff) { void MipsTargetStreamer::emitFMask(unsigned FPUBitmask, int FPUTopSavedRegOff) {
} }
void MipsTargetStreamer::emitDirectiveSetMips1() {} void MipsTargetStreamer::emitDirectiveSetMips1() { setCanHaveModuleDir(false); }
void MipsTargetStreamer::emitDirectiveSetMips2() {} void MipsTargetStreamer::emitDirectiveSetMips2() { setCanHaveModuleDir(false); }
void MipsTargetStreamer::emitDirectiveSetMips3() {} void MipsTargetStreamer::emitDirectiveSetMips3() { setCanHaveModuleDir(false); }
void MipsTargetStreamer::emitDirectiveSetMips4() {} void MipsTargetStreamer::emitDirectiveSetMips4() { setCanHaveModuleDir(false); }
void MipsTargetStreamer::emitDirectiveSetMips5() {} void MipsTargetStreamer::emitDirectiveSetMips5() { setCanHaveModuleDir(false); }
void MipsTargetStreamer::emitDirectiveSetMips32() {} void MipsTargetStreamer::emitDirectiveSetMips32() {
void MipsTargetStreamer::emitDirectiveSetMips32R2() {} setCanHaveModuleDir(false);
void MipsTargetStreamer::emitDirectiveSetMips32R6() {} }
void MipsTargetStreamer::emitDirectiveSetMips64() {} void MipsTargetStreamer::emitDirectiveSetMips32R2() {
void MipsTargetStreamer::emitDirectiveSetMips64R2() {} setCanHaveModuleDir(false);
void MipsTargetStreamer::emitDirectiveSetMips64R6() {} }
void MipsTargetStreamer::emitDirectiveSetDsp() {} void MipsTargetStreamer::emitDirectiveSetMips32R6() {
setCanHaveModuleDir(false);
}
void MipsTargetStreamer::emitDirectiveSetMips64() {
setCanHaveModuleDir(false);
}
void MipsTargetStreamer::emitDirectiveSetMips64R2() {
setCanHaveModuleDir(false);
}
void MipsTargetStreamer::emitDirectiveSetMips64R6() {
setCanHaveModuleDir(false);
}
void MipsTargetStreamer::emitDirectiveSetDsp() { setCanHaveModuleDir(false); }
void MipsTargetStreamer::emitDirectiveCpload(unsigned RegNo) {} void MipsTargetStreamer::emitDirectiveCpload(unsigned RegNo) {}
void MipsTargetStreamer::emitDirectiveCpsetup(unsigned RegNo, int RegOrOffset, void MipsTargetStreamer::emitDirectiveCpsetup(unsigned RegNo, int RegOrOffset,
const MCSymbol &Sym, bool IsReg) { const MCSymbol &Sym, bool IsReg) {
@ -99,12 +117,12 @@ void MipsTargetAsmStreamer::emitDirectiveSetMips16() {
void MipsTargetAsmStreamer::emitDirectiveSetNoMips16() { void MipsTargetAsmStreamer::emitDirectiveSetNoMips16() {
OS << "\t.set\tnomips16\n"; OS << "\t.set\tnomips16\n";
setCanHaveModuleDir(false); MipsTargetStreamer::emitDirectiveSetNoMips16();
} }
void MipsTargetAsmStreamer::emitDirectiveSetReorder() { void MipsTargetAsmStreamer::emitDirectiveSetReorder() {
OS << "\t.set\treorder\n"; OS << "\t.set\treorder\n";
setCanHaveModuleDir(false); MipsTargetStreamer::emitDirectiveSetReorder();
} }
void MipsTargetAsmStreamer::emitDirectiveSetNoReorder() { void MipsTargetAsmStreamer::emitDirectiveSetNoReorder() {
@ -114,12 +132,12 @@ void MipsTargetAsmStreamer::emitDirectiveSetNoReorder() {
void MipsTargetAsmStreamer::emitDirectiveSetMacro() { void MipsTargetAsmStreamer::emitDirectiveSetMacro() {
OS << "\t.set\tmacro\n"; OS << "\t.set\tmacro\n";
setCanHaveModuleDir(false); MipsTargetStreamer::emitDirectiveSetMacro();
} }
void MipsTargetAsmStreamer::emitDirectiveSetNoMacro() { void MipsTargetAsmStreamer::emitDirectiveSetNoMacro() {
OS << "\t.set\tnomacro\n"; OS << "\t.set\tnomacro\n";
setCanHaveModuleDir(false); MipsTargetStreamer::emitDirectiveSetNoMacro();
} }
void MipsTargetAsmStreamer::emitDirectiveSetMsa() { void MipsTargetAsmStreamer::emitDirectiveSetMsa() {
@ -134,12 +152,12 @@ void MipsTargetAsmStreamer::emitDirectiveSetNoMsa() {
void MipsTargetAsmStreamer::emitDirectiveSetAt() { void MipsTargetAsmStreamer::emitDirectiveSetAt() {
OS << "\t.set\tat\n"; OS << "\t.set\tat\n";
setCanHaveModuleDir(false); MipsTargetStreamer::emitDirectiveSetAt();
} }
void MipsTargetAsmStreamer::emitDirectiveSetNoAt() { void MipsTargetAsmStreamer::emitDirectiveSetNoAt() {
OS << "\t.set\tnoat\n"; OS << "\t.set\tnoat\n";
setCanHaveModuleDir(false); MipsTargetStreamer::emitDirectiveSetNoAt();
} }
void MipsTargetAsmStreamer::emitDirectiveEnd(StringRef Name) { void MipsTargetAsmStreamer::emitDirectiveEnd(StringRef Name) {
@ -176,62 +194,62 @@ void MipsTargetAsmStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
void MipsTargetAsmStreamer::emitDirectiveSetMips1() { void MipsTargetAsmStreamer::emitDirectiveSetMips1() {
OS << "\t.set\tmips1\n"; OS << "\t.set\tmips1\n";
setCanHaveModuleDir(false); MipsTargetStreamer::emitDirectiveSetMips1();
} }
void MipsTargetAsmStreamer::emitDirectiveSetMips2() { void MipsTargetAsmStreamer::emitDirectiveSetMips2() {
OS << "\t.set\tmips2\n"; OS << "\t.set\tmips2\n";
setCanHaveModuleDir(false); MipsTargetStreamer::emitDirectiveSetMips2();
} }
void MipsTargetAsmStreamer::emitDirectiveSetMips3() { void MipsTargetAsmStreamer::emitDirectiveSetMips3() {
OS << "\t.set\tmips3\n"; OS << "\t.set\tmips3\n";
setCanHaveModuleDir(false); MipsTargetStreamer::emitDirectiveSetMips3();
} }
void MipsTargetAsmStreamer::emitDirectiveSetMips4() { void MipsTargetAsmStreamer::emitDirectiveSetMips4() {
OS << "\t.set\tmips4\n"; OS << "\t.set\tmips4\n";
setCanHaveModuleDir(false); MipsTargetStreamer::emitDirectiveSetMips4();
} }
void MipsTargetAsmStreamer::emitDirectiveSetMips5() { void MipsTargetAsmStreamer::emitDirectiveSetMips5() {
OS << "\t.set\tmips5\n"; OS << "\t.set\tmips5\n";
setCanHaveModuleDir(false); MipsTargetStreamer::emitDirectiveSetMips5();
} }
void MipsTargetAsmStreamer::emitDirectiveSetMips32() { void MipsTargetAsmStreamer::emitDirectiveSetMips32() {
OS << "\t.set\tmips32\n"; OS << "\t.set\tmips32\n";
setCanHaveModuleDir(false); MipsTargetStreamer::emitDirectiveSetMips32();
} }
void MipsTargetAsmStreamer::emitDirectiveSetMips32R2() { void MipsTargetAsmStreamer::emitDirectiveSetMips32R2() {
OS << "\t.set\tmips32r2\n"; OS << "\t.set\tmips32r2\n";
setCanHaveModuleDir(false); MipsTargetStreamer::emitDirectiveSetMips32R2();
} }
void MipsTargetAsmStreamer::emitDirectiveSetMips32R6() { void MipsTargetAsmStreamer::emitDirectiveSetMips32R6() {
OS << "\t.set\tmips32r6\n"; OS << "\t.set\tmips32r6\n";
setCanHaveModuleDir(false); MipsTargetStreamer::emitDirectiveSetMips32R6();
} }
void MipsTargetAsmStreamer::emitDirectiveSetMips64() { void MipsTargetAsmStreamer::emitDirectiveSetMips64() {
OS << "\t.set\tmips64\n"; OS << "\t.set\tmips64\n";
setCanHaveModuleDir(false); MipsTargetStreamer::emitDirectiveSetMips64();
} }
void MipsTargetAsmStreamer::emitDirectiveSetMips64R2() { void MipsTargetAsmStreamer::emitDirectiveSetMips64R2() {
OS << "\t.set\tmips64r2\n"; OS << "\t.set\tmips64r2\n";
setCanHaveModuleDir(false); MipsTargetStreamer::emitDirectiveSetMips64R2();
} }
void MipsTargetAsmStreamer::emitDirectiveSetMips64R6() { void MipsTargetAsmStreamer::emitDirectiveSetMips64R6() {
OS << "\t.set\tmips64r6\n"; OS << "\t.set\tmips64r6\n";
setCanHaveModuleDir(false); MipsTargetStreamer::emitDirectiveSetMips64R6();
} }
void MipsTargetAsmStreamer::emitDirectiveSetDsp() { void MipsTargetAsmStreamer::emitDirectiveSetDsp() {
OS << "\t.set\tdsp\n"; OS << "\t.set\tdsp\n";
setCanHaveModuleDir(false); MipsTargetStreamer::emitDirectiveSetDsp();
} }
// Print a 32 bit hex number with all numbers. // Print a 32 bit hex number with all numbers.
static void printHex32(unsigned Value, raw_ostream &OS) { static void printHex32(unsigned Value, raw_ostream &OS) {
@ -440,6 +458,7 @@ void MipsTargetELFStreamer::emitDirectiveSetMicroMips() {
unsigned Flags = MCA.getELFHeaderEFlags(); unsigned Flags = MCA.getELFHeaderEFlags();
Flags |= ELF::EF_MIPS_MICROMIPS; Flags |= ELF::EF_MIPS_MICROMIPS;
MCA.setELFHeaderEFlags(Flags); MCA.setELFHeaderEFlags(Flags);
setCanHaveModuleDir(false);
} }
void MipsTargetELFStreamer::emitDirectiveSetNoMicroMips() { void MipsTargetELFStreamer::emitDirectiveSetNoMicroMips() {
@ -455,16 +474,6 @@ void MipsTargetELFStreamer::emitDirectiveSetMips16() {
setCanHaveModuleDir(false); setCanHaveModuleDir(false);
} }
void MipsTargetELFStreamer::emitDirectiveSetNoMips16() {
// FIXME: implement.
setCanHaveModuleDir(false);
}
void MipsTargetELFStreamer::emitDirectiveSetReorder() {
// FIXME: implement.
setCanHaveModuleDir(false);
}
void MipsTargetELFStreamer::emitDirectiveSetNoReorder() { void MipsTargetELFStreamer::emitDirectiveSetNoReorder() {
MCAssembler &MCA = getStreamer().getAssembler(); MCAssembler &MCA = getStreamer().getAssembler();
unsigned Flags = MCA.getELFHeaderEFlags(); unsigned Flags = MCA.getELFHeaderEFlags();
@ -473,26 +482,6 @@ void MipsTargetELFStreamer::emitDirectiveSetNoReorder() {
setCanHaveModuleDir(false); setCanHaveModuleDir(false);
} }
void MipsTargetELFStreamer::emitDirectiveSetMacro() {
// FIXME: implement.
setCanHaveModuleDir(false);
}
void MipsTargetELFStreamer::emitDirectiveSetNoMacro() {
// FIXME: implement.
setCanHaveModuleDir(false);
}
void MipsTargetELFStreamer::emitDirectiveSetAt() {
// FIXME: implement.
setCanHaveModuleDir(false);
}
void MipsTargetELFStreamer::emitDirectiveSetNoAt() {
// FIXME: implement.
setCanHaveModuleDir(false);
}
void MipsTargetELFStreamer::emitDirectiveEnd(StringRef Name) { void MipsTargetELFStreamer::emitDirectiveEnd(StringRef Name) {
MCAssembler &MCA = getStreamer().getAssembler(); MCAssembler &MCA = getStreamer().getAssembler();
MCContext &Context = MCA.getContext(); MCContext &Context = MCA.getContext();
@ -602,54 +591,6 @@ void MipsTargetELFStreamer::emitFMask(unsigned FPUBitmask,
FPROffset = FPUTopSavedRegOff; FPROffset = FPUTopSavedRegOff;
} }
void MipsTargetELFStreamer::emitDirectiveSetMips1() {
setCanHaveModuleDir(false);
}
void MipsTargetELFStreamer::emitDirectiveSetMips2() {
setCanHaveModuleDir(false);
}
void MipsTargetELFStreamer::emitDirectiveSetMips3() {
setCanHaveModuleDir(false);
}
void MipsTargetELFStreamer::emitDirectiveSetMips4() {
setCanHaveModuleDir(false);
}
void MipsTargetELFStreamer::emitDirectiveSetMips5() {
setCanHaveModuleDir(false);
}
void MipsTargetELFStreamer::emitDirectiveSetMips32() {
setCanHaveModuleDir(false);
}
void MipsTargetELFStreamer::emitDirectiveSetMips32R2() {
setCanHaveModuleDir(false);
}
void MipsTargetELFStreamer::emitDirectiveSetMips32R6() {
setCanHaveModuleDir(false);
}
void MipsTargetELFStreamer::emitDirectiveSetMips64() {
setCanHaveModuleDir(false);
}
void MipsTargetELFStreamer::emitDirectiveSetMips64R2() {
setCanHaveModuleDir(false);
}
void MipsTargetELFStreamer::emitDirectiveSetMips64R6() {
setCanHaveModuleDir(false);
}
void MipsTargetELFStreamer::emitDirectiveSetDsp() {
setCanHaveModuleDir(false);
}
void MipsTargetELFStreamer::emitDirectiveCpload(unsigned RegNo) { void MipsTargetELFStreamer::emitDirectiveCpload(unsigned RegNo) {
// .cpload $reg // .cpload $reg
// This directive expands to: // This directive expands to:

View File

@ -191,14 +191,8 @@ public:
void emitDirectiveSetMicroMips() override; void emitDirectiveSetMicroMips() override;
void emitDirectiveSetNoMicroMips() override; void emitDirectiveSetNoMicroMips() override;
void emitDirectiveSetMips16() override; void emitDirectiveSetMips16() override;
void emitDirectiveSetNoMips16() override;
void emitDirectiveSetReorder() override;
void emitDirectiveSetNoReorder() override; void emitDirectiveSetNoReorder() override;
void emitDirectiveSetMacro() override;
void emitDirectiveSetNoMacro() override;
void emitDirectiveSetAt() override;
void emitDirectiveSetNoAt() override;
void emitDirectiveEnd(StringRef Name) override; void emitDirectiveEnd(StringRef Name) override;
void emitDirectiveEnt(const MCSymbol &Symbol) override; void emitDirectiveEnt(const MCSymbol &Symbol) override;
@ -212,19 +206,6 @@ public:
void emitMask(unsigned CPUBitmask, int CPUTopSavedRegOff) override; void emitMask(unsigned CPUBitmask, int CPUTopSavedRegOff) override;
void emitFMask(unsigned FPUBitmask, int FPUTopSavedRegOff) override; void emitFMask(unsigned FPUBitmask, int FPUTopSavedRegOff) override;
void emitDirectiveSetMips1() override;
void emitDirectiveSetMips2() override;
void emitDirectiveSetMips3() override;
void emitDirectiveSetMips4() override;
void emitDirectiveSetMips5() override;
void emitDirectiveSetMips32() override;
void emitDirectiveSetMips32R2() override;
void emitDirectiveSetMips32R6() override;
void emitDirectiveSetMips64() override;
void emitDirectiveSetMips64R2() override;
void emitDirectiveSetMips64R6() override;
void emitDirectiveSetDsp() override;
// PIC support // PIC support
virtual void emitDirectiveCpload(unsigned RegNo); virtual void emitDirectiveCpload(unsigned RegNo);
void emitDirectiveCpsetup(unsigned RegNo, int RegOrOffset, void emitDirectiveCpsetup(unsigned RegNo, int RegOrOffset,