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TargetAsmParser doesn't need reference to Target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134721 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -15,7 +15,6 @@
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namespace llvm {
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namespace llvm {
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class MCStreamer;
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class MCStreamer;
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class StringRef;
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class StringRef;
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class Target;
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class SMLoc;
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class SMLoc;
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class AsmToken;
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class AsmToken;
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class MCParsedAsmOperand;
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class MCParsedAsmOperand;
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@ -26,23 +25,19 @@ class TargetAsmParser : public MCAsmParserExtension {
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TargetAsmParser(const TargetAsmParser &); // DO NOT IMPLEMENT
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TargetAsmParser(const TargetAsmParser &); // DO NOT IMPLEMENT
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void operator=(const TargetAsmParser &); // DO NOT IMPLEMENT
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void operator=(const TargetAsmParser &); // DO NOT IMPLEMENT
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protected: // Can only create subclasses.
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protected: // Can only create subclasses.
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TargetAsmParser(const Target &);
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TargetAsmParser();
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/// The Target that this machine was created for.
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/// AvailableFeatures - The current set of available features.
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const Target &TheTarget;
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/// The current set of available features.
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unsigned AvailableFeatures;
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unsigned AvailableFeatures;
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public:
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public:
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virtual ~TargetAsmParser();
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virtual ~TargetAsmParser();
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const Target &getTarget() const { return TheTarget; }
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unsigned getAvailableFeatures() const { return AvailableFeatures; }
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unsigned getAvailableFeatures() const { return AvailableFeatures; }
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void setAvailableFeatures(unsigned Value) { AvailableFeatures = Value; }
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void setAvailableFeatures(unsigned Value) { AvailableFeatures = Value; }
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virtual bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc) = 0;
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virtual bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc,
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SMLoc &EndLoc) = 0;
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/// ParseInstruction - Parse one assembly instruction.
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/// ParseInstruction - Parse one assembly instruction.
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///
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///
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@ -79,7 +79,7 @@ namespace llvm {
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const std::string &TT);
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const std::string &TT);
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typedef TargetAsmLexer *(*AsmLexerCtorTy)(const Target &T,
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typedef TargetAsmLexer *(*AsmLexerCtorTy)(const Target &T,
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const MCAsmInfo &MAI);
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const MCAsmInfo &MAI);
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typedef TargetAsmParser *(*AsmParserCtorTy)(const Target &T, StringRef TT,
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typedef TargetAsmParser *(*AsmParserCtorTy)(StringRef TT,
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StringRef CPU, StringRef Features,
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StringRef CPU, StringRef Features,
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MCAsmParser &P);
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MCAsmParser &P);
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typedef MCDisassembler *(*MCDisassemblerCtorTy)(const Target &T);
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typedef MCDisassembler *(*MCDisassemblerCtorTy)(const Target &T);
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@ -300,10 +300,11 @@ namespace llvm {
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/// \arg Parser - The target independent parser implementation to use for
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/// \arg Parser - The target independent parser implementation to use for
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/// parsing and lexing.
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/// parsing and lexing.
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TargetAsmParser *createAsmParser(StringRef Triple, StringRef CPU,
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TargetAsmParser *createAsmParser(StringRef Triple, StringRef CPU,
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StringRef Features, MCAsmParser &Parser) const {
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StringRef Features,
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MCAsmParser &Parser) const {
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if (!AsmParserCtorFn)
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if (!AsmParserCtorFn)
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return 0;
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return 0;
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return AsmParserCtorFn(*this, Triple, CPU, Features, Parser);
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return AsmParserCtorFn(Triple, CPU, Features, Parser);
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}
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}
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/// createAsmPrinter - Create a target specific assembly printer pass. This
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/// createAsmPrinter - Create a target specific assembly printer pass. This
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@ -858,10 +859,9 @@ namespace llvm {
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}
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}
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private:
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private:
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static TargetAsmParser *Allocator(const Target &T, StringRef TT,
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static TargetAsmParser *Allocator(StringRef TT, StringRef CPU,
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StringRef CPU, StringRef FS,
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StringRef FS, MCAsmParser &P) {
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MCAsmParser &P) {
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return new AsmParserImpl(TT, CPU, FS, P);
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return new AsmParserImpl(T, TT, CPU, FS, P);
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}
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}
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};
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};
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@ -10,8 +10,8 @@
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#include "llvm/Target/TargetAsmParser.h"
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#include "llvm/Target/TargetAsmParser.h"
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using namespace llvm;
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using namespace llvm;
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TargetAsmParser::TargetAsmParser(const Target &T)
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TargetAsmParser::TargetAsmParser()
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: TheTarget(T), AvailableFeatures(0)
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: AvailableFeatures(0)
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{
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{
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}
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}
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@ -41,7 +41,7 @@ class ARMOperand;
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class ARMAsmParser : public TargetAsmParser {
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class ARMAsmParser : public TargetAsmParser {
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MCAsmParser &Parser;
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MCAsmParser &Parser;
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MCSubtargetInfo *STI;
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const MCSubtargetInfo *STI;
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MCAsmParser &getParser() const { return Parser; }
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MCAsmParser &getParser() const { return Parser; }
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MCAsmLexer &getLexer() const { return Parser.getLexer(); }
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MCAsmLexer &getLexer() const { return Parser.getLexer(); }
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@ -127,9 +127,8 @@ class ARMAsmParser : public TargetAsmParser {
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const SmallVectorImpl<MCParsedAsmOperand*> &);
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const SmallVectorImpl<MCParsedAsmOperand*> &);
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public:
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public:
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ARMAsmParser(const Target &T, StringRef TT, StringRef CPU, StringRef FS,
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ARMAsmParser(StringRef TT, StringRef CPU, StringRef FS, MCAsmParser &_Parser)
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MCAsmParser &_Parser)
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: TargetAsmParser(), Parser(_Parser) {
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: TargetAsmParser(T), Parser(_Parser) {
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STI = ARM_MC::createARMMCSubtargetInfo(TT, CPU, FS);
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STI = ARM_MC::createARMMCSubtargetInfo(TT, CPU, FS);
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MCAsmParserExtension::Initialize(_Parser);
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MCAsmParserExtension::Initialize(_Parser);
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@ -63,9 +63,9 @@ class MBlazeAsmParser : public TargetAsmParser {
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public:
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public:
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MBlazeAsmParser(const Target &T, StringRef TT, StringRef CPU, StringRef FS,
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MBlazeAsmParser(StringRef TT, StringRef CPU, StringRef FS,
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MCAsmParser &_Parser)
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MCAsmParser &_Parser)
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: TargetAsmParser(T), Parser(_Parser) {}
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: TargetAsmParser(), Parser(_Parser) {}
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virtual bool ParseInstruction(StringRef Name, SMLoc NameLoc,
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virtual bool ParseInstruction(StringRef Name, SMLoc NameLoc,
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SmallVectorImpl<MCParsedAsmOperand*> &Operands);
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SmallVectorImpl<MCParsedAsmOperand*> &Operands);
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@ -37,7 +37,7 @@ struct X86Operand;
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class X86ATTAsmParser : public TargetAsmParser {
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class X86ATTAsmParser : public TargetAsmParser {
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MCAsmParser &Parser;
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MCAsmParser &Parser;
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MCSubtargetInfo *STI;
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const MCSubtargetInfo *STI;
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private:
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private:
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MCAsmParser &getParser() const { return Parser; }
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MCAsmParser &getParser() const { return Parser; }
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@ -77,9 +77,9 @@ private:
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/// }
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/// }
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public:
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public:
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X86ATTAsmParser(const Target &T, StringRef TT, StringRef CPU, StringRef FS,
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X86ATTAsmParser(StringRef TT, StringRef CPU, StringRef FS,
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MCAsmParser &parser)
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MCAsmParser &parser)
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: TargetAsmParser(T), Parser(parser) {
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: TargetAsmParser(), Parser(parser) {
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STI = X86_MC::createX86MCSubtargetInfo(TT, CPU, FS);
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STI = X86_MC::createX86MCSubtargetInfo(TT, CPU, FS);
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// Initialize the set of available features.
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// Initialize the set of available features.
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