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ARM add more 'gas' compatibility aliases for NEON instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146507 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -242,6 +242,12 @@ class VFP3InstAlias<string Asm, dag Result, bit Emit = 0b1>
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class NEONInstAlias<string Asm, dag Result, bit Emit = 0b1>
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: InstAlias<Asm, Result, Emit>, Requires<[HasNEON]>;
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class VFP2MnemonicAlias<string src, string dst> : MnemonicAlias<src, dst>,
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Requires<[HasVFP2]>;
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class NEONMnemonicAlias<string src, string dst> : MnemonicAlias<src, dst>,
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Requires<[HasNEON]>;
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//===----------------------------------------------------------------------===//
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// ARM Instruction templates.
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//
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@ -5308,6 +5308,7 @@ def : Pat<(v2f64 (bitconvert (v4f32 QPR:$src))), (v2f64 QPR:$src)>;
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//===----------------------------------------------------------------------===//
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// Assembler aliases
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//
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def : VFP2InstAlias<"fmdhr${p} $Dd, $Rn",
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(VSETLNi32 DPR:$Dd, GPR:$Rn, 1, pred:$p)>;
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def : VFP2InstAlias<"fmdlr${p} $Dd, $Rn",
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@ -5706,3 +5707,33 @@ def : NEONInstAlias<"vext${p}.32 $Vdn, $Vm, $imm",
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(VEXTq32 QPR:$Vdn, QPR:$Vdn, QPR:$Vm, imm0_3:$imm, pred:$p)>;
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def : NEONInstAlias<"vext${p}.64 $Vdn, $Vm, $imm",
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(VEXTq64 QPR:$Vdn, QPR:$Vdn, QPR:$Vm, imm0_1:$imm, pred:$p)>;
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// 'gas' compatibility aliases for quad-word instructions. Strictly speaking,
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// these should restrict to just the Q register variants, but the register
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// classes are enough to match correctly regardless, so we keep it simple
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// and just use MnemonicAlias.
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def : NEONMnemonicAlias<"vbicq", "vbic">;
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def : NEONMnemonicAlias<"vandq", "vand">;
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def : NEONMnemonicAlias<"veorq", "veor">;
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def : NEONMnemonicAlias<"vorrq", "vorr">;
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def : NEONMnemonicAlias<"vmovq", "vmov">;
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def : NEONMnemonicAlias<"vmvnq", "vmvn">;
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def : NEONMnemonicAlias<"vaddq", "vadd">;
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def : NEONMnemonicAlias<"vsubq", "vsub">;
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def : NEONMnemonicAlias<"vminq", "vmin">;
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def : NEONMnemonicAlias<"vmaxq", "vmax">;
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def : NEONMnemonicAlias<"vmulq", "vmul">;
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def : NEONMnemonicAlias<"vabsq", "vabs">;
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def : NEONMnemonicAlias<"vshlq", "vshl">;
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def : NEONMnemonicAlias<"vshrq", "vshr">;
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def : NEONMnemonicAlias<"vcvtq", "vcvt">;
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def : NEONMnemonicAlias<"vcleq", "vcle">;
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def : NEONMnemonicAlias<"vceqq", "vceq">;
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@ -1160,9 +1160,6 @@ def FCONSTS : VFPAI<(outs SPR:$Sd), (ins vfp_f32imm:$imm),
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//===----------------------------------------------------------------------===//
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// Assembler aliases.
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//
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class VFP2MnemonicAlias<string src, string dst> : MnemonicAlias<src, dst>,
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Requires<[HasVFP2]>;
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// A few mnemnoic aliases for pre-unifixed syntax. We don't guarantee to
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// support them all, but supporting at least some of the basics is
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// good to be friendly.
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