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https://github.com/c64scene-ar/llvm-6502.git
synced 2025-02-09 13:33:17 +00:00
Corrected many typing errors. And removed 'nest' parameter handling
for fastcc from X86CallingConv.td. This means that nested functions are not supported for calling convention 'fastcc'. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42934 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -861,8 +861,8 @@ public:
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virtual SDOperand LowerOperation(SDOperand Op, SelectionDAG &DAG);
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/// IsEligibleForTailCallOptimization - Check whether the call is eligible for
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/// tail call optimization. Target which want to do tail call optimization
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/// should implement this function.
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/// tail call optimization. Targets which want to do tail call optimization
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/// should override this function.
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virtual bool IsEligibleForTailCallOptimization(SDOperand Call,
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SDOperand Ret,
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SelectionDAG &DAG) const {
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@ -74,9 +74,9 @@ namespace llvm {
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/// be emitted.
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extern bool ExceptionHandling;
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/// PerformTailCallOpt - This flag is enabled when the -tailcallopt is
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/// specified on the commandline. When the flag is on, the target will perform
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/// tail call optimization (pop the caller's stack) providing it supports it.
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/// PerformTailCallOpt - This flag is enabled when -tailcallopt is specified
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/// on the commandline. When the flag is on, the target will perform tail call
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/// optimization (pop the caller's stack) providing it supports it.
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extern bool PerformTailCallOpt;
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} // End llvm namespace
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@ -4476,7 +4476,7 @@ static void copyCatchInfo(BasicBlock *SrcBB, BasicBlock *DestBB,
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}
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/// CheckDAGForTailCallsAndFixThem - This Function looks for CALL nodes in the
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/// DAG and fixes their tailcall attribute operand
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/// DAG and fixes their tailcall attribute operand.
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static void CheckDAGForTailCallsAndFixThem(SelectionDAG &DAG,
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TargetLowering& TLI) {
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SDNode * Ret = NULL;
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@ -4497,7 +4497,7 @@ static void CheckDAGForTailCallsAndFixThem(SelectionDAG &DAG,
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cast<ConstantSDNode>(OpCall.getOperand(3))->getValue() != 0;
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// If CALL node has tail call attribute set to true and the call is not
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// eligible (no RET or the target rejects) the attribute is fixed to
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// false. The TargetLowering::IsEligibleForTailCallOptimization function
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// false. The TargetLowering::IsEligibleForTailCallOptimization function
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// must correctly identify tail call optimizable calls.
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if (isMarkedTailCall &&
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(Ret==NULL ||
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@ -1352,14 +1352,15 @@ L7:
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L5:
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//===---------------------------------------------------------------------===//
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Tail call optimization improvements: Tail call optimization currently
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pushes all arguments on the top of the stack (their normal place if
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that was a not tail call optimized functiong call ) before moving them
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to actual stack slot. this is done to prevent overwriting of paramters
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(see example below) that might be used, since the arguments of the
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callee overwrites callers arguments.
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example:
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Tail call optimization improvements: Tail call optimization currently
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pushes all arguments on the top of the stack (their normal place for
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non-tail call optimized calls) before moving them to actual stack
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slot. This is done to prevent overwriting of parameters (see example
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below) that might be used, since the arguments of the callee
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overwrites caller's arguments.
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example:
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int callee(int32, int64);
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int caller(int32 arg1, int32 arg2) {
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@ -1371,39 +1372,41 @@ int caller(int32 arg1, int32 arg2) {
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[arg2] -> [(int64)
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[RETADDR] local ]
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moving arg1 onto the stack slot of callee function would overwrite
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Moving arg1 onto the stack slot of callee function would overwrite
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arg2 of the caller.
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Possible optimizations:
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- only push those arguments to the top of the stack that are actual
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- Only push those arguments to the top of the stack that are actual
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parameters of the caller function and have no local value in the
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caller
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caller.
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in above example local does not need to be pushed onto the top of
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the stack as it is definitetly not a caller's function parameter
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In the above example local does not need to be pushed onto the top
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of the stack as it is definitely not a caller's function
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parameter.
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- analyse the actual parameters of the callee to see which would
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overwrite a caller paramter which is used by the callee and only
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push them onto the top of the stack
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- Analyse the actual parameters of the callee to see which would
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overwrite a caller parameter which is used by the callee and only
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push them onto the top of the stack.
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int callee (int32 arg1, int32 arg2);
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int caller (int32 arg1, int32 arg2) {
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return callee(arg1,arg2);
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}
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here we don't need to write any variables to the top of the stack
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since they don't overwrite each other
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Here we don't need to write any variables to the top of the stack
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since they don't overwrite each other.
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int callee (int32 arg1, int32 arg2);
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int caller (int32 arg1, int32 arg2) {
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return callee(arg2,arg1);
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}
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here we need to push the arguments because they overwrite each other
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Here we need to push the arguments because they overwrite each
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other.
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code for lowering directly onto callers arguments:
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Code for lowering directly onto callers arguments:
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+ SmallVector<std::pair<unsigned, SDOperand>, 8> RegsToPass;
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+ SmallVector<SDOperand, 8> MemOpChains;
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+
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@ -1,4 +1,4 @@
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//===- X86.td - Target definition file for the Intel X86 arch ---*- C++ -*-===//
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//===- X86.td - Target definition file for the Intel X86 ---*- tablegen -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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@ -1,4 +1,4 @@
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//===- X86CallingConv.td - Calling Conventions for X86 32/64 ----*- C++ -*-===//
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//===- X86CallingConv.td - Calling Conventions X86 32/64 ---*- tablegen -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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@ -127,7 +127,7 @@ def CC_X86_64_C : CallingConv<[
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CCIfType<[v8i8, v4i16, v2i32, v1i64], CCAssignToStack<8, 8>>
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]>;
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// tail call convetion (fast) one register is reserved for target address
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// Tail call convention (fast): One register is reserved for target address,
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// namely R9
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def CC_X86_64_TailCall : CallingConv<[
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// Promote i8/i16 arguments to i32.
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@ -207,15 +207,14 @@ def CC_X86_32_C : CallingConv<[
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CCDelegateTo<CC_X86_32_Common>
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]>;
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/// Same as C calling convention up to nonfree ECX which is used for storing
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/// potential pointer to tail called function
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/// Same as C calling convention except for non-free ECX which is used for storing
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/// a potential pointer to the tail called function.
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def CC_X86_32_TailCall : CallingConv<[
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// Promote i8/i16 arguments to i32.
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CCIfType<[i8, i16], CCPromoteToType<i32>>,
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// The 'nest' parameter, if any, is passed in ECX.
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CCIfNest<CCAssignToReg<[ECX]>>,
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// Nested functions are currently not supported by fastcc.
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// The first 3 integer arguments, if marked 'inreg' and if the call is not
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// a vararg call, are passed in integer registers.
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CCIfNotVarArg<CCIfInReg<CCIfType<[i32], CCAssignToReg<[EAX, EDX]>>>>,
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@ -1,4 +1,4 @@
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//===-- X86ISelLowering.cpp - X86 DAG Lowering Implementation -------------===//
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//===-- X86isellowering.cpp - X86 DAG Lowering Implementation -------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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@ -1402,13 +1402,12 @@ SDOperand X86TargetLowering::LowerFastCCCallTo(SDOperand Op, SelectionDAG &DAG,
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// * elf/pic is disabled OR
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// * elf/pic enabled + callee is in module + callee has
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// visibility protected or hidden
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// To ensure the stack is aligned according to platform abi pass
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// tail-call-align-stack. This makes sure that argument delta is always
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// multiples of stack alignment. (Dynamic linkers need this - darwin's dyld for
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// example)
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// To keep the stack aligned according to platform abi the function
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// GetAlignedArgumentStackSize ensures that argument delta is always multiples
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// of stack alignment. (Dynamic linkers need this - darwin's dyld for example)
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// If a tail called function callee has more arguments than the caller the
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// caller needs to make sure that there is room to move the RETADDR to. This is
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// achived by reserving an area the size of the argument delta right after the
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// achieved by reserving an area the size of the argument delta right after the
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// original REtADDR, but before the saved framepointer or the spilled registers
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// e.g. caller(arg1, arg2) calls callee(arg1, arg2,arg3,arg4)
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// stack layout:
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@ -1,4 +1,4 @@
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//==- X86InstrFPStack.td - Describe the X86 Instruction Set -------*- C++ -*-=//
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//==- X86InstrFPStack.td - Describe the X86 Instruction Set --*- tablegen -*-=//
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//
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// The LLVM Compiler Infrastructure
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//
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@ -1,4 +1,4 @@
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//===- X86InstrInfo.td - Describe the X86 Instruction Set -------*- C++ -*-===//
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//===- X86InstrInfo.td - Describe the X86 Instruction Set --*- tablegen -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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@ -1,4 +1,4 @@
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//====- X86InstrSSE.td - Describe the X86 Instruction Set -------*- C++ -*-===//
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//====- X86InstrSSE.td - Describe the X86 Instruction Set --*- tablegen -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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@ -1,4 +1,4 @@
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//====- X86InstrX86-64.td - Describe the X86 Instruction Set ----*- C++ -*-===//
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//====- X86InstrX86-64.td - Describe the X86 Instr. Set ----*- tablegen -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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@ -1,4 +1,4 @@
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//===- X86RegisterInfo.td - Describe the X86 Register File ------*- C++ -*-===//
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//===- X86RegisterInfo.td - Describe the X86 Register File --*- tablegen -*-==//
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//
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// The LLVM Compiler Infrastructure
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//
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