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Update IR when merging slots in stack coloring
The way that stack coloring updated MMOs when merging stack slots, while correct, is suboptimal, and is incompatible with the use of AA during instruction scheduling. The solution, which involves the use of const_cast (and more importantly, updating the IR from within an MI-level pass), obviously requires some explanation: When the stack coloring pass was originally committed, the code in ScheduleDAGInstrs::buildSchedGraph tracked possible alias sets by using GetUnderlyingObject, and all load/store and store/store memory control dependencies where added between SUs at the object level (where only one object, that returned by GetUnderlyingObject, was used to identify the object associated with each MMO). When stack coloring merged stack slots, it would replace MMOs derived from the remapped alloca with the alloca with which the remapped alloca was being replaced. Because ScheduleDAGInstrs only used single objects, and tracked alias sets at the object level, this was a fine solution. In r169744, (Andy and) I updated the code in ScheduleDAGInstrs to use GetUnderlyingObjects, and track alias sets using, potentially, multiple underlying objects for each MMO. This was done, primarily, to provide the ability to look through PHIs, and provide better scheduling for induction-variable-dependent loads and stores inside loops. At this point, the MMO-updating code in stack coloring became suboptimal, because it would clear the MMOs for (i.e. completely pessimize) all instructions for which r169744 might help in scheduling. Updating the IR directly is the simplest fix for this (and the one with, by far, the least compile-time impact), but others are possible (we could give each MMO a small vector of potential values, or make use of a remapping table, constructed from MFI, inside ScheduleDAGInstrs). Unfortunately, replacing all MMO values derived from the remapped alloca with the base replacement alloca fundamentally breaks our ability to use AA during instruction scheduling (which is critical to performance on some targets). The reason is that the original MMO might have had an offset (either constant or dynamic) from the base remapped alloca, and that offset is not present in the updated MMO. One possible way around this would be to use GetPointerBaseWithConstantOffset, and update not only the MMO's value, but also its offset based on the original offset. Unfortunately, this solution would only handle constant offsets, and for safety (because AA is not completely restricted to deducing relationships with constant offsets), we would need to clear all MMOs without constant offsets over the entire function. This would be an even worse pessimization than the current single-object restriction. Any other solution would involve passing around a vector of remapped allocas, and teaching AA to use it, introducing additional complexity and overhead into AA. Instead, when remapping an alloca, we replace all IR uses of that alloca as well (optionally inserting a bitcast as necessary). This is even more efficient that the old MMO-updating code in the stack coloring pass (because it removes the need to call GetUnderlyingObject on all MMO values), removes the single-object pessimization in the default configuration, and enables the correct use of AA during instruction scheduling (all without any additional overhead). LLVM now no longer miscompiles itself on x86_64 when using -enable-misched -enable-aa-sched-mi -misched-bottomup=0 -misched-topdown=0 -misched=shuffle! Fixed PR18497. Because the alloca replacement is now done at the IR level, unless the MMO directly refers to the remapped alloca, the change cannot be seen at the MI level. As a result, there is no good way to fix test/CodeGen/X86/pr14090.ll. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199658 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Hal Finkel
parent
5e908e3bab
commit
48f7a2389e
@ -503,6 +503,24 @@ void StackColoring::remapInstructions(DenseMap<int, int> &SlotRemap) {
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const AllocaInst *To = MFI->getObjectAllocation(it->second);
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assert(To && From && "Invalid allocation object");
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Allocas[From] = To;
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// AA might be used later for instruction scheduling, and we need it to be
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// able to deduce the correct aliasing releationships between pointers
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// derived from the alloca being remapped and the target of that remapping.
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// The only safe way, without directly informing AA about the remapping
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// somehow, is to directly update the IR to reflect the change being made
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// here.
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Instruction *Inst = const_cast<AllocaInst *>(To);
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if (From->getType() != To->getType()) {
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BitCastInst *Cast = new BitCastInst(Inst, From->getType());
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Cast->insertAfter(Inst);
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Inst = Cast;
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}
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// Note that this will not replace uses in MMOs (which we'll update below),
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// or anywhere else (which is why we won't delete the original
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// instruction).
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const_cast<AllocaInst *>(From)->replaceAllUsesWith(Inst);
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}
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// Remap all instructions to the new stack slots.
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@ -526,20 +544,11 @@ void StackColoring::remapInstructions(DenseMap<int, int> &SlotRemap) {
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if (!V)
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continue;
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const PseudoSourceValue *PSV = dyn_cast<const PseudoSourceValue>(V);
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if (PSV && PSV->isConstant(MFI))
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// We've replaced IR-level uses of the remapped allocas, so we only
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// need to replace direct uses here.
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if (!isa<AllocaInst>(V))
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continue;
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// Climb up and find the original alloca.
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V = GetUnderlyingObject(V);
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// If we did not find one, or if the one that we found is not in our
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// map, then move on.
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if (!V || !isa<AllocaInst>(V)) {
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// Clear mem operand since we don't know for sure that it doesn't
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// alias a merged alloca.
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MMO->setValue(0);
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continue;
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}
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const AllocaInst *AI= cast<AllocaInst>(V);
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if (!Allocas.count(AI))
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continue;
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186
test/CodeGen/X86/misched-aa-colored.ll
Normal file
186
test/CodeGen/X86/misched-aa-colored.ll
Normal file
@ -0,0 +1,186 @@
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; RUN: llc < %s -mcpu=x86-64 -enable-misched -misched-bottomup=0 -misched-topdown=0 -misched=shuffle -enable-aa-sched-mi | FileCheck %s
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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|
||||
%"struct.llvm::ilist_traits.25.57.657.1017.1977.2097.2337.4137" = type { %"struct.llvm::RecyclerStruct.56.656.1016.1976.2096.2336.4136" }
|
||||
%"struct.llvm::RecyclerStruct.56.656.1016.1976.2096.2336.4136" = type { %"struct.llvm::RecyclerStruct.56.656.1016.1976.2096.2336.4136"*, %"struct.llvm::RecyclerStruct.56.656.1016.1976.2096.2336.4136"* }
|
||||
%"class.llvm::FoldingSet.67.667.1027.1987.2107.2347.4147" = type { %"class.llvm::FoldingSetImpl.66.666.1026.1986.2106.2346.4146" }
|
||||
%"class.llvm::FoldingSetImpl.66.666.1026.1986.2106.2346.4146" = type { i32 (...)**, i8**, i32, i32 }
|
||||
%"class.llvm::BumpPtrAllocator.64.664.1024.1984.2104.2344.4144" = type { i64, i64, %"class.llvm::MallocSlabAllocator.62.662.1022.1982.2102.2342.4142", %"class.llvm::SlabAllocator.60.660.1020.1980.2100.2340.4140"*, %"class.llvm::MemSlab.63.663.1023.1983.2103.2343.4143"*, i8*, i8*, i64 }
|
||||
%"class.llvm::MallocSlabAllocator.62.662.1022.1982.2102.2342.4142" = type { %"class.llvm::SlabAllocator.60.660.1020.1980.2100.2340.4140", %"class.llvm::MallocAllocator.61.661.1021.1981.2101.2341.4141" }
|
||||
%"class.llvm::SlabAllocator.60.660.1020.1980.2100.2340.4140" = type { i32 (...)** }
|
||||
%"class.llvm::MallocAllocator.61.661.1021.1981.2101.2341.4141" = type { i8 }
|
||||
%"class.llvm::MemSlab.63.663.1023.1983.2103.2343.4143" = type { i64, %"class.llvm::MemSlab.63.663.1023.1983.2103.2343.4143"* }
|
||||
%"class.llvm::SDDbgInfo.79.679.1039.1999.2119.2359.4159" = type { %"class.llvm::SmallVector.30.74.674.1034.1994.2114.2354.4154", %"class.llvm::SmallVector.30.74.674.1034.1994.2114.2354.4154", %"class.llvm::DenseMap.37.78.678.1038.1998.2118.2358.4158" }
|
||||
%"class.llvm::SmallVector.30.74.674.1034.1994.2114.2354.4154" = type { %"class.llvm::SmallVectorImpl.31.72.672.1032.1992.2112.2352.4152", %"struct.llvm::SmallVectorStorage.36.73.673.1033.1993.2113.2353.4153" }
|
||||
%"class.llvm::SmallVectorImpl.31.72.672.1032.1992.2112.2352.4152" = type { %"class.llvm::SmallVectorTemplateBase.32.71.671.1031.1991.2111.2351.4151" }
|
||||
%"class.llvm::SmallVectorTemplateBase.32.71.671.1031.1991.2111.2351.4151" = type { %"class.llvm::SmallVectorTemplateCommon.33.70.670.1030.1990.2110.2350.4150" }
|
||||
%"class.llvm::SmallVectorTemplateCommon.33.70.670.1030.1990.2110.2350.4150" = type { %"class.llvm::SmallVectorBase.24.624.984.1944.2064.2304.4104", %"struct.llvm::AlignedCharArrayUnion.34.69.669.1029.1989.2109.2349.4149" }
|
||||
%"struct.llvm::AlignedCharArrayUnion.34.69.669.1029.1989.2109.2349.4149" = type { %"struct.llvm::AlignedCharArray.35.68.668.1028.1988.2108.2348.4148" }
|
||||
%"struct.llvm::AlignedCharArray.35.68.668.1028.1988.2108.2348.4148" = type { [8 x i8] }
|
||||
%"struct.llvm::SmallVectorStorage.36.73.673.1033.1993.2113.2353.4153" = type { [31 x %"struct.llvm::AlignedCharArrayUnion.34.69.669.1029.1989.2109.2349.4149"] }
|
||||
%"class.llvm::DenseMap.37.78.678.1038.1998.2118.2358.4158" = type { %"struct.std::pair.40.77.677.1037.1997.2117.2357.4157"*, i32, i32, i32 }
|
||||
%"struct.std::pair.40.77.677.1037.1997.2117.2357.4157" = type { %"class.llvm::SDNode.10.610.970.1930.2050.2290.4090"*, %"class.llvm::SmallVector.41.76.676.1036.1996.2116.2356.4156" }
|
||||
%"class.llvm::SmallVector.41.76.676.1036.1996.2116.2356.4156" = type { %"class.llvm::SmallVectorImpl.31.72.672.1032.1992.2112.2352.4152", %"struct.llvm::SmallVectorStorage.42.75.675.1035.1995.2115.2355.4155" }
|
||||
%"struct.llvm::SmallVectorStorage.42.75.675.1035.1995.2115.2355.4155" = type { [1 x %"struct.llvm::AlignedCharArrayUnion.34.69.669.1029.1989.2109.2349.4149"] }
|
||||
%"struct.llvm::SelectionDAG::DAGUpdateListener.80.680.1040.2000.2120.2360.4160" = type { i32 (...)**, %"struct.llvm::SelectionDAG::DAGUpdateListener.80.680.1040.2000.2120.2360.4160"*, %"class.llvm::SelectionDAG.104.704.1064.2024.2144.2384.4184"* }
|
||||
%"class.std::map.43.84.684.1044.2004.2124.2364.4164" = type { %"class.std::_Rb_tree.44.83.683.1043.2003.2123.2363.4163" }
|
||||
%"class.std::_Rb_tree.44.83.683.1043.2003.2123.2363.4163" = type { %"struct.std::_Rb_tree<const llvm::SDNode *, std::pair<const llvm::SDNode *const, std::basic_string<char> >, std::_Select1st<std::pair<const llvm::SDNode *const, std::basic_string<char> > >, std::less<const llvm::SDNode *>, std::allocator<std::pair<const llvm::SDNode *const, std::basic_string<char> > > >::_Rb_tree_impl.82.682.1042.2002.2122.2362.4162" }
|
||||
%"struct.std::_Rb_tree<const llvm::SDNode *, std::pair<const llvm::SDNode *const, std::basic_string<char> >, std::_Select1st<std::pair<const llvm::SDNode *const, std::basic_string<char> > >, std::less<const llvm::SDNode *>, std::allocator<std::pair<const llvm::SDNode *const, std::basic_string<char> > > >::_Rb_tree_impl.82.682.1042.2002.2122.2362.4162" = type { %"struct.std::less.48.81.681.1041.2001.2121.2361.4161", %"struct.std::_Rb_tree_node_base.46.646.1006.1966.2086.2326.4126", i64 }
|
||||
%"struct.std::less.48.81.681.1041.2001.2121.2361.4161" = type { i8 }
|
||||
%"class.llvm::FoldingSet.50.85.685.1045.2005.2125.2365.4165" = type { %"class.llvm::FoldingSetImpl.66.666.1026.1986.2106.2346.4146" }
|
||||
%"class.std::vector.51.89.689.1049.2009.2129.2369.4169" = type { %"struct.std::_Vector_base.52.88.688.1048.2008.2128.2368.4168" }
|
||||
%"struct.std::_Vector_base.52.88.688.1048.2008.2128.2368.4168" = type { %"struct.std::_Vector_base<llvm::CondCodeSDNode *, std::allocator<llvm::CondCodeSDNode *> >::_Vector_impl.87.687.1047.2007.2127.2367.4167" }
|
||||
%"struct.std::_Vector_base<llvm::CondCodeSDNode *, std::allocator<llvm::CondCodeSDNode *> >::_Vector_impl.87.687.1047.2007.2127.2367.4167" = type { %"class.llvm::CondCodeSDNode.86.686.1046.2006.2126.2366.4166"**, %"class.llvm::CondCodeSDNode.86.686.1046.2006.2126.2366.4166"**, %"class.llvm::CondCodeSDNode.86.686.1046.2006.2126.2366.4166"** }
|
||||
%"class.llvm::CondCodeSDNode.86.686.1046.2006.2126.2366.4166" = type { %"class.llvm::SDNode.10.610.970.1930.2050.2290.4090", i32 }
|
||||
%"class.std::vector.56.92.692.1052.2012.2132.2372.4172" = type { %"struct.std::_Vector_base.57.91.691.1051.2011.2131.2371.4171" }
|
||||
%"struct.std::_Vector_base.57.91.691.1051.2011.2131.2371.4171" = type { %"struct.std::_Vector_base<llvm::SDNode *, std::allocator<llvm::SDNode *> >::_Vector_impl.90.690.1050.2010.2130.2370.4170" }
|
||||
%"struct.std::_Vector_base<llvm::SDNode *, std::allocator<llvm::SDNode *> >::_Vector_impl.90.690.1050.2010.2130.2370.4170" = type { %"class.llvm::SDNode.10.610.970.1930.2050.2290.4090"**, %"class.llvm::SDNode.10.610.970.1930.2050.2290.4090"**, %"class.llvm::SDNode.10.610.970.1930.2050.2290.4090"** }
|
||||
%"class.std::map.61.96.696.1056.2016.2136.2376.4176" = type { %"class.std::_Rb_tree.62.95.695.1055.2015.2135.2375.4175" }
|
||||
%"class.std::_Rb_tree.62.95.695.1055.2015.2135.2375.4175" = type { %"struct.std::_Rb_tree<llvm::EVT, std::pair<const llvm::EVT, llvm::SDNode *>, std::_Select1st<std::pair<const llvm::EVT, llvm::SDNode *> >, llvm::EVT::compareRawBits, std::allocator<std::pair<const llvm::EVT, llvm::SDNode *> > >::_Rb_tree_impl.94.694.1054.2014.2134.2374.4174" }
|
||||
%"struct.std::_Rb_tree<llvm::EVT, std::pair<const llvm::EVT, llvm::SDNode *>, std::_Select1st<std::pair<const llvm::EVT, llvm::SDNode *> >, llvm::EVT::compareRawBits, std::allocator<std::pair<const llvm::EVT, llvm::SDNode *> > >::_Rb_tree_impl.94.694.1054.2014.2134.2374.4174" = type { %"struct.llvm::EVT::compareRawBits.93.693.1053.2013.2133.2373.4173", %"struct.std::_Rb_tree_node_base.46.646.1006.1966.2086.2326.4126", i64 }
|
||||
%"struct.llvm::EVT::compareRawBits.93.693.1053.2013.2133.2373.4173" = type { i8 }
|
||||
%"class.llvm::StringMap.99.699.1059.2019.2139.2379.4179" = type { %"class.llvm::StringMapImpl.98.698.1058.2018.2138.2378.4178", %"class.llvm::MallocAllocator.61.661.1021.1981.2101.2341.4141" }
|
||||
%"class.llvm::StringMapImpl.98.698.1058.2018.2138.2378.4178" = type { %"class.llvm::StringMapEntryBase.97.697.1057.2017.2137.2377.4177"**, i32, i32, i32, i32 }
|
||||
%"class.llvm::StringMapEntryBase.97.697.1057.2017.2137.2377.4177" = type { i32 }
|
||||
%"class.std::map.66.103.703.1063.2023.2143.2383.4183" = type { %"class.std::_Rb_tree.67.102.702.1062.2022.2142.2382.4182" }
|
||||
%"class.std::_Rb_tree.67.102.702.1062.2022.2142.2382.4182" = type { %"struct.std::_Rb_tree<std::pair<std::basic_string<char>, unsigned char>, std::pair<const std::pair<std::basic_string<char>, unsigned char>, llvm::SDNode *>, std::_Select1st<std::pair<const std::pair<std::basic_string<char>, unsigned char>, llvm::SDNode *> >, std::less<std::pair<std::basic_string<char>, unsigned char> >, std::allocator<std::pair<const std::pair<std::basic_string<char>, unsigned char>, llvm::SDNode *> > >::_Rb_tree_impl.101.701.1061.2021.2141.2381.4181" }
|
||||
%"struct.std::_Rb_tree<std::pair<std::basic_string<char>, unsigned char>, std::pair<const std::pair<std::basic_string<char>, unsigned char>, llvm::SDNode *>, std::_Select1st<std::pair<const std::pair<std::basic_string<char>, unsigned char>, llvm::SDNode *> >, std::less<std::pair<std::basic_string<char>, unsigned char> >, std::allocator<std::pair<const std::pair<std::basic_string<char>, unsigned char>, llvm::SDNode *> > >::_Rb_tree_impl.101.701.1061.2021.2141.2381.4181" = type { %"struct.std::less.71.100.700.1060.2020.2140.2380.4180", %"struct.std::_Rb_tree_node_base.46.646.1006.1966.2086.2326.4126", i64 }
|
||||
%"struct.std::less.71.100.700.1060.2020.2140.2380.4180" = type { i8 }
|
||||
%"class.llvm::Type.7.607.967.1927.2047.2287.4087" = type { %"class.llvm::LLVMContext.6.606.966.1926.2046.2286.4086"*, i32, i32, %"class.llvm::Type.7.607.967.1927.2047.2287.4087"** }
|
||||
%"class.llvm::DAGTypeLegalizer.117.717.1077.2037.2157.2397.4197" = type { %"class.llvm::TargetLowering.51.651.1011.1971.2091.2331.4131"*, %"class.llvm::SelectionDAG.104.704.1064.2024.2144.2384.4184"*, %"class.llvm::TargetLoweringBase::ValueTypeActionImpl.40.640.1000.1960.2080.2320.4120", [6 x i8], %"class.llvm::SmallDenseMap.107.707.1067.2027.2147.2387.4187", %"class.llvm::SmallDenseMap.77.110.710.1070.2030.2150.2390.4190", %"class.llvm::SmallDenseMap.107.707.1067.2027.2147.2387.4187", %"class.llvm::SmallDenseMap.77.110.710.1070.2030.2150.2390.4190", %"class.llvm::SmallDenseMap.107.707.1067.2027.2147.2387.4187", %"class.llvm::SmallDenseMap.77.110.710.1070.2030.2150.2390.4190", %"class.llvm::SmallDenseMap.107.707.1067.2027.2147.2387.4187", %"class.llvm::SmallDenseMap.107.707.1067.2027.2147.2387.4187", %"class.llvm::SmallVector.82.116.716.1076.2036.2156.2396.4196" }
|
||||
%"class.llvm::SmallDenseMap.77.110.710.1070.2030.2150.2390.4190" = type { [4 x i8], i32, %"struct.llvm::AlignedCharArrayUnion.80.109.709.1069.2029.2149.2389.4189" }
|
||||
%"struct.llvm::AlignedCharArrayUnion.80.109.709.1069.2029.2149.2389.4189" = type { %"struct.llvm::AlignedCharArray.81.108.708.1068.2028.2148.2388.4188" }
|
||||
%"struct.llvm::AlignedCharArray.81.108.708.1068.2028.2148.2388.4188" = type { [384 x i8] }
|
||||
%"class.llvm::SmallDenseMap.107.707.1067.2027.2147.2387.4187" = type { [4 x i8], i32, %"struct.llvm::AlignedCharArrayUnion.75.106.706.1066.2026.2146.2386.4186" }
|
||||
%"struct.llvm::AlignedCharArrayUnion.75.106.706.1066.2026.2146.2386.4186" = type { %"struct.llvm::AlignedCharArray.76.105.705.1065.2025.2145.2385.4185" }
|
||||
%"struct.llvm::AlignedCharArray.76.105.705.1065.2025.2145.2385.4185" = type { [256 x i8] }
|
||||
%"class.llvm::SmallVector.82.116.716.1076.2036.2156.2396.4196" = type { %"class.llvm::SmallVectorImpl.83.114.714.1074.2034.2154.2394.4194", %"struct.llvm::SmallVectorStorage.87.115.715.1075.2035.2155.2395.4195" }
|
||||
%"class.llvm::SmallVectorImpl.83.114.714.1074.2034.2154.2394.4194" = type { %"class.llvm::SmallVectorTemplateBase.84.113.713.1073.2033.2153.2393.4193" }
|
||||
%"class.llvm::SmallVectorTemplateBase.84.113.713.1073.2033.2153.2393.4193" = type { %"class.llvm::SmallVectorTemplateCommon.85.112.712.1072.2032.2152.2392.4192" }
|
||||
%"class.llvm::SmallVectorTemplateCommon.85.112.712.1072.2032.2152.2392.4192" = type { %"class.llvm::SmallVectorBase.24.624.984.1944.2064.2304.4104", %"struct.llvm::AlignedCharArrayUnion.86.111.711.1071.2031.2151.2391.4191" }
|
||||
%"struct.llvm::AlignedCharArrayUnion.86.111.711.1071.2031.2151.2391.4191" = type { %"struct.llvm::AlignedCharArray.35.68.668.1028.1988.2108.2348.4148" }
|
||||
%"struct.llvm::SmallVectorStorage.87.115.715.1075.2035.2155.2395.4195" = type { [127 x %"struct.llvm::AlignedCharArrayUnion.86.111.711.1071.2031.2151.2391.4191"] }
|
||||
%"struct.std::pair.112.119.719.1079.2039.2159.2399.4199" = type { i32, %"struct.llvm::EVT.8.608.968.1928.2048.2288.4088" }
|
||||
%"class.llvm::DenseMapBase.73.118.718.1078.2038.2158.2398.4198" = type { i8 }
|
||||
|
||||
@.str61 = external hidden unnamed_addr constant [80 x i8], align 1
|
||||
@.str63 = external hidden unnamed_addr constant [80 x i8], align 1
|
||||
@.str74 = external hidden unnamed_addr constant [49 x i8], align 1
|
||||
@__PRETTY_FUNCTION__._ZN4llvm16DAGTypeLegalizer16GetWidenedVectorENS_7SDValueE = external hidden unnamed_addr constant [70 x i8], align 1
|
||||
@.str98 = external hidden unnamed_addr constant [46 x i8], align 1
|
||||
@__PRETTY_FUNCTION__._ZNK4llvm6SDNode12getValueTypeEj = external hidden unnamed_addr constant [57 x i8], align 1
|
||||
@.str99 = external hidden unnamed_addr constant [19 x i8], align 1
|
||||
@__PRETTY_FUNCTION__._ZN4llvm5SDLocC2EPKNS_6SDNodeE = external hidden unnamed_addr constant [41 x i8], align 1
|
||||
@.str100 = external hidden unnamed_addr constant [50 x i8], align 1
|
||||
@__PRETTY_FUNCTION__._ZNK4llvm6SDNode10getOperandEj = external hidden unnamed_addr constant [66 x i8], align 1
|
||||
|
||||
declare { %"class.llvm::SDNode.10.610.970.1930.2050.2290.4090"*, i32 } @_ZN4llvm12SelectionDAG7getNodeEjNS_5SDLocENS_3EVTENS_7SDValueES3_(%"class.llvm::SelectionDAG.104.704.1064.2024.2144.2384.4184"*, i32, i8*, i32, i32, %"class.llvm::Type.7.607.967.1927.2047.2287.4087"*, %"class.llvm::SDValue.3.603.963.1923.2043.2283.4083"* byval align 8, %"class.llvm::SDValue.3.603.963.1923.2043.2283.4083"* byval align 8)
|
||||
|
||||
; Function Attrs: noreturn nounwind
|
||||
declare void @__assert_fail(i8*, i8*, i32, i8*) #0
|
||||
|
||||
; Function Attrs: nounwind
|
||||
declare void @llvm.lifetime.start(i64, i8* nocapture) #1
|
||||
|
||||
; Function Attrs: nounwind
|
||||
declare void @llvm.lifetime.end(i64, i8* nocapture) #1
|
||||
|
||||
; Function Attrs: nounwind uwtable
|
||||
define hidden { %"class.llvm::SDNode.10.610.970.1930.2050.2290.4090"*, i32 } @_ZN4llvm16DAGTypeLegalizer18WidenVecRes_BinaryEPNS_6SDNodeE(%"class.llvm::DAGTypeLegalizer.117.717.1077.2037.2157.2397.4197"* %this, %"class.llvm::SDNode.10.610.970.1930.2050.2290.4090"* %N) #2 align 2 {
|
||||
entry:
|
||||
%Op.i43 = alloca %"class.llvm::SDValue.3.603.963.1923.2043.2283.4083", align 8
|
||||
%ref.tmp.i = alloca %"struct.std::pair.112.119.719.1079.2039.2159.2399.4199", align 8
|
||||
%Op.i = alloca %"class.llvm::SDValue.3.603.963.1923.2043.2283.4083", align 8
|
||||
%0 = bitcast %"struct.std::pair.112.119.719.1079.2039.2159.2399.4199"* %ref.tmp.i to i8*
|
||||
%retval.sroa.0.0.idx.i36 = getelementptr inbounds %"struct.std::pair.112.119.719.1079.2039.2159.2399.4199"* %ref.tmp.i, i64 0, i32 1, i32 0, i32 0
|
||||
%retval.sroa.0.0.copyload.i37 = load i32* %retval.sroa.0.0.idx.i36, align 8
|
||||
call void @llvm.lifetime.end(i64 24, i8* %0) #1
|
||||
%agg.tmp8.sroa.2.0.copyload = load i32* undef, align 8
|
||||
%1 = bitcast %"class.llvm::SDValue.3.603.963.1923.2043.2283.4083"* %Op.i to i8*
|
||||
call void @llvm.lifetime.start(i64 16, i8* %1) #1
|
||||
%2 = getelementptr %"class.llvm::SDValue.3.603.963.1923.2043.2283.4083"* %Op.i, i64 0, i32 1
|
||||
store i32 %agg.tmp8.sroa.2.0.copyload, i32* %2, align 8
|
||||
|
||||
; CHECK: movl (%rax), %eax
|
||||
; CHECK-NOT: movl %eax, {{[0-9]+}}(%rsp)
|
||||
; CHECK: movl [[OFF:[0-9]+]](%rsp), %r8d
|
||||
; CHECK: movl %eax, [[OFF]](%rsp)
|
||||
; CHECK: movl $-1, %ecx
|
||||
; CHECK: callq _ZN4llvm12SelectionDAG7getNodeEjNS_5SDLocENS_3EVTENS_7SDValueES3_
|
||||
|
||||
%call18 = call { %"class.llvm::SDNode.10.610.970.1930.2050.2290.4090"*, i32 } @_ZN4llvm12SelectionDAG7getNodeEjNS_5SDLocENS_3EVTENS_7SDValueES3_(%"class.llvm::SelectionDAG.104.704.1064.2024.2144.2384.4184"* undef, i32 undef, i8* undef, i32 -1, i32 %retval.sroa.0.0.copyload.i37, %"class.llvm::Type.7.607.967.1927.2047.2287.4087"* undef, %"class.llvm::SDValue.3.603.963.1923.2043.2283.4083"* byval align 8 undef, %"class.llvm::SDValue.3.603.963.1923.2043.2283.4083"* byval align 8 undef) #1
|
||||
ret { %"class.llvm::SDNode.10.610.970.1930.2050.2290.4090"*, i32 } %call18
|
||||
}
|
||||
|
||||
; Function Attrs: nounwind uwtable
|
||||
declare hidden %"class.llvm::SDValue.3.603.963.1923.2043.2283.4083"* @_ZN4llvm12DenseMapBaseINS_13SmallDenseMapINS_7SDValueES2_Lj8ENS_12DenseMapInfoIS2_EEEES2_S2_S4_EixERKS2_(%"class.llvm::DenseMapBase.73.118.718.1078.2038.2158.2398.4198"*, %"class.llvm::SDValue.3.603.963.1923.2043.2283.4083"* nocapture readonly) #2 align 2
|
||||
|
||||
declare hidden void @_ZN4llvm16DAGTypeLegalizer10RemapValueERNS_7SDValueE(%"class.llvm::DAGTypeLegalizer.117.717.1077.2037.2157.2397.4197"*, %"class.llvm::SDValue.3.603.963.1923.2043.2283.4083"*)
|
||||
|
||||
; Function Attrs: nounwind uwtable
|
||||
declare hidden void @_ZNK4llvm18TargetLoweringBase17getTypeConversionERNS_11LLVMContextENS_3EVTE(%"struct.std::pair.112.119.719.1079.2039.2159.2399.4199"* noalias sret, %"class.llvm::TargetLoweringBase.50.650.1010.1970.2090.2330.4130"* readonly, %"class.llvm::LLVMContext.6.606.966.1926.2046.2286.4086"*, i32, %"class.llvm::Type.7.607.967.1927.2047.2287.4087"*) #2 align 2
|
||||
|
||||
attributes #0 = { noreturn nounwind }
|
||||
attributes #1 = { nounwind }
|
||||
attributes #2 = { nounwind uwtable }
|
||||
|
||||
@ -1,70 +0,0 @@
|
||||
; RUN: llc < %s -march=x86-64 -print-before=stack-coloring -print-after=stack-coloring >%t 2>&1 && FileCheck <%t %s
|
||||
|
||||
define void @foo(i64* %retval.i, i32 %call, i32* %.ph.i80, i32 %fourteen, i32* %out.lo, i32* %out.hi) nounwind align 2 {
|
||||
entry:
|
||||
%_Tmp.i39 = alloca i64, align 8
|
||||
%retval.i33 = alloca i64, align 8
|
||||
%_Tmp.i = alloca i64, align 8
|
||||
%retval.i.i = alloca i64, align 8
|
||||
%_First.i = alloca i64, align 8
|
||||
|
||||
%0 = load i64* %retval.i, align 8
|
||||
|
||||
%1 = load i64* %retval.i, align 8
|
||||
|
||||
%_Tmp.i39.0.cast73 = bitcast i64* %_Tmp.i39 to i8*
|
||||
call void @llvm.lifetime.start(i64 8, i8* %_Tmp.i39.0.cast73)
|
||||
store i64 %1, i64* %_Tmp.i39, align 8
|
||||
%cmp.i.i.i40 = icmp slt i32 %call, 0
|
||||
%2 = lshr i64 %1, 32
|
||||
%3 = trunc i64 %2 to i32
|
||||
%sub.i.i.i44 = sub i32 0, %call
|
||||
%cmp2.i.i.i45 = icmp ult i32 %3, %sub.i.i.i44
|
||||
%or.cond.i.i.i46 = and i1 %cmp.i.i.i40, %cmp2.i.i.i45
|
||||
%add.i.i.i47 = add i32 %3, %call
|
||||
%sub5.i.i.i48 = lshr i32 %add.i.i.i47, 5
|
||||
%trunc.i50 = trunc i64 %1 to i32
|
||||
%inttoptr.i51 = inttoptr i32 %trunc.i50 to i32*
|
||||
%add61617.i.i.i52 = or i32 %sub5.i.i.i48, -134217728
|
||||
%add61617.i.sub5.i.i.i53 = select i1 %or.cond.i.i.i46, i32 %add61617.i.i.i52, i32 %sub5.i.i.i48
|
||||
%storemerge2.i.i54 = getelementptr inbounds i32* %inttoptr.i51, i32 %add61617.i.sub5.i.i.i53
|
||||
%_Tmp.i39.0.cast74 = bitcast i64* %_Tmp.i39 to i32**
|
||||
store i32* %storemerge2.i.i54, i32** %_Tmp.i39.0.cast74, align 8
|
||||
%storemerge.i.i55 = and i32 %add.i.i.i47, 31
|
||||
%_Tmp.i39.4.raw_idx = getelementptr inbounds i8* %_Tmp.i39.0.cast73, i32 4
|
||||
%_Tmp.i39.4.cast = bitcast i8* %_Tmp.i39.4.raw_idx to i32*
|
||||
store i32 %storemerge.i.i55, i32* %_Tmp.i39.4.cast, align 4
|
||||
%srcval.i56 = load i64* %_Tmp.i39, align 8
|
||||
call void @llvm.lifetime.end(i64 8, i8* %_Tmp.i39.0.cast73)
|
||||
|
||||
; CHECK: Before Merge disjoint stack slots
|
||||
; CHECK: [[PREFIX15:MOV64mr.*<fi#]]{{[0-9]}}[[SUFFIX15:.*;]] mem:ST8[%fifteen]
|
||||
; CHECK: [[PREFIX87:MOV32mr.*;]] mem:ST4[%sunkaddr87]
|
||||
|
||||
; CHECK: After Merge disjoint stack slots
|
||||
; CHECK: [[PREFIX15]]{{[0-9]}}[[SUFFIX15]] mem:ST8[%_Tmp.i39]
|
||||
; CHECK: [[PREFIX87]] mem:ST4[<unknown>]
|
||||
|
||||
%fifteen = bitcast i64* %retval.i.i to i32**
|
||||
%sixteen = bitcast i64* %retval.i.i to i8*
|
||||
call void @llvm.lifetime.start(i64 8, i8* %sixteen)
|
||||
store i32* %.ph.i80, i32** %fifteen, align 8
|
||||
%sunkaddr = ptrtoint i64* %retval.i.i to i32
|
||||
%sunkaddr86 = add i32 %sunkaddr, 4
|
||||
%sunkaddr87 = inttoptr i32 %sunkaddr86 to i32*
|
||||
store i32 %fourteen, i32* %sunkaddr87, align 4
|
||||
%seventeen = load i64* %retval.i.i, align 8
|
||||
call void @llvm.lifetime.end(i64 8, i8* %sixteen)
|
||||
%eighteen = lshr i64 %seventeen, 32
|
||||
%nineteen = trunc i64 %eighteen to i32
|
||||
%shl.i.i.i = shl i32 1, %nineteen
|
||||
|
||||
store i32 %shl.i.i.i, i32* %out.lo, align 8
|
||||
store i32 %nineteen, i32* %out.hi, align 8
|
||||
|
||||
ret void
|
||||
}
|
||||
|
||||
declare void @llvm.lifetime.start(i64, i8* nocapture) nounwind
|
||||
|
||||
declare void @llvm.lifetime.end(i64, i8* nocapture) nounwind
|
||||
Loading…
Reference in New Issue
Block a user