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[mips] Fix a bug for NaCl target - Don't report the error when non-dangerous

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load/store is in branch delay slot.

Differential Revision: http://llvm-reviews.chandlerc.com/D4048

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210470 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Sasa Stankovic 2014-06-09 14:09:28 +00:00
parent 592d439efe
commit 49b83e1e76
2 changed files with 40 additions and 7 deletions
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13
lib/Target/Mips/MCTargetDesc/MipsNaClELFStreamer.cpp
View File

@ -137,18 +137,17 @@ public:
&IsStore);
bool IsSPFirstOperand = isStackPointerFirstOperand(Inst);
if (IsMemAccess || IsSPFirstOperand) {
if (PendingCall)
report_fatal_error("Dangerous instruction in branch delay slot!");
bool MaskBefore = (IsMemAccess
&& baseRegNeedsLoadStoreMask(Inst.getOperand(AddrIdx)
.getReg()));
bool MaskAfter = IsSPFirstOperand && !IsStore;
if (MaskBefore || MaskAfter)
if (MaskBefore || MaskAfter) {
if (PendingCall)
report_fatal_error("Dangerous instruction in branch delay slot!");
sandboxLoadStoreStackChange(Inst, AddrIdx, STI, MaskBefore, MaskAfter);
else
MipsELFStreamer::EmitInstruction(Inst, STI);
return;
return;
}
// fallthrough
}
// Sandbox calls by aligning call and branch delay to the bundle end.

34
test/MC/Mips/nacl-mask.s
View File

@ -283,3 +283,37 @@ test5:
# CHECK-NEXT: and $25, $25, $14
# CHECK-NEXT: jalr $25
# CHECK-NEXT: addiu $4, $zero, 5
# Test that we can put non-dangerous loads and stores in branch delay slot.
.align 4
test6:
.set noreorder
jal func1
sw $4, 0($sp)
bal func2
lw $5, 0($t8)
jalr $t9
sw $sp, 0($sp)
# CHECK-LABEL: test6:
# CHECK-NEXT: nop
# CHECK-NEXT: nop
# CHECK-NEXT: jal
# CHECK-NEXT: sw $4, 0($sp)
# CHECK-NEXT: nop
# CHECK-NEXT: nop
# CHECK-NEXT: bal
# CHECK-NEXT: lw $5, 0($24)
# CHECK-NEXT: nop
# CHECK-NEXT: and $25, $25, $14
# CHECK-NEXT: jalr
# CHECK-NEXT: sw $sp, 0($sp)