6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-01-10 02:36:06 +00:00
Code Issues Projects Releases Wiki Activity

First potential client of register scavenger.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34516 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2007-02-23 01:11:26 +00:00
parent 0fa1b6d1b1
commit 49dd06461a
1 changed files with 13 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

17
lib/CodeGen/PrologEpilogInserter.cpp
View File

@ -20,6 +20,7 @@
#include "llvm/CodeGen/MachineFunctionPass.h" #include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstr.h" #include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineFrameInfo.h" #include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/RegisterScavenging.h"
#include "llvm/Target/TargetMachine.h" #include "llvm/Target/TargetMachine.h"
#include "llvm/Target/MRegisterInfo.h" #include "llvm/Target/MRegisterInfo.h"
#include "llvm/Target/TargetFrameInfo.h" #include "llvm/Target/TargetFrameInfo.h"
@ -231,10 +232,12 @@ void PEI::saveCalleeSavedRegisters(MachineFunction &Fn) {
MachineBasicBlock::iterator I = MBB->begin(); MachineBasicBlock::iterator I = MBB->begin();
if (!RegInfo->spillCalleeSavedRegisters(*MBB, I, CSI)) { if (!RegInfo->spillCalleeSavedRegisters(*MBB, I, CSI)) {
for (unsigned i = 0, e = CSI.size(); i != e; ++i) { for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
// Add the callee-saved register as live-in. It's killed at the spill.
MBB->addLiveIn(CSI[i].getReg());
// Insert the spill to the stack frame. // Insert the spill to the stack frame.
RegInfo->storeRegToStackSlot(*MBB, I, CSI[i].getReg(), RegInfo->storeRegToStackSlot(*MBB, I, CSI[i].getReg(),
CSI[i].getFrameIdx(), CSI[i].getFrameIdx(), CSI[i].getRegClass());
CSI[i].getRegClass());
} }
} }
@ -440,8 +443,9 @@ void PEI::replaceFrameIndices(MachineFunction &Fn) {
assert(TM.getRegisterInfo() && "TM::getRegisterInfo() must be implemented!"); assert(TM.getRegisterInfo() && "TM::getRegisterInfo() must be implemented!");
const MRegisterInfo &MRI = *TM.getRegisterInfo(); const MRegisterInfo &MRI = *TM.getRegisterInfo();
for (MachineFunction::iterator BB = Fn.begin(), E = Fn.end(); BB != E; ++BB) for (MachineFunction::iterator BB = Fn.begin(), E = Fn.end(); BB != E; ++BB) {
for (MachineBasicBlock::iterator I = BB->begin(); I != BB->end(); ++I) RegScavenger RS(BB);
for (MachineBasicBlock::iterator I = BB->begin(); I != BB->end(); ++I) {
for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i) for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i)
if (I->getOperand(i).isFrameIndex()) { if (I->getOperand(i).isFrameIndex()) {
// If this instruction has a FrameIndex operand, we need to use that // If this instruction has a FrameIndex operand, we need to use that
@ -449,4 +453,9 @@ void PEI::replaceFrameIndices(MachineFunction &Fn) {
MRI.eliminateFrameIndex(I); MRI.eliminateFrameIndex(I);
break; break;
} }
// Update register states.
if (MRI.requiresRegisterScavenging())
RS.forward();
}
}
} }