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Add an option and stuff implementation of a dag isel emitter

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23236 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2005-09-03 01:14:03 +00:00
parent 6a8a21ced4
commit 4a24c645c8
2 changed files with 45 additions and 0 deletions
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38
utils/TableGen/DAGISelEmitter.h Normal file
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@ -0,0 +1,38 @@
//===- DAGISelEmitter.h - Generate an instruction selector ------*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
// This file was developed by Chris Lattner and is distributed under
// the University of Illinois Open Source License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This tablegen backend emits a DAG instruction selector.
//
//===----------------------------------------------------------------------===//
#ifndef DAGISEL_EMITTER_H
#define DAGISEL_EMITTER_H
#include "TableGenBackend.h"
#include "CodeGenTarget.h"
namespace llvm {
/// InstrSelectorEmitter - The top-level class which coordinates construction
/// and emission of the instruction selector.
///
class DAGISelEmitter : public TableGenBackend {
RecordKeeper &Records;
CodeGenTarget Target;
public:
DAGISelEmitter(RecordKeeper &R) : Records(R) {}
// run - Output the isel, returning true on failure.
void run(std::ostream &OS) {}
};
} // End llvm namespace
#endif

7
utils/TableGen/TableGen.cpp
View File

@ -24,6 +24,7 @@
#include "InstrInfoEmitter.h"
#include "AsmWriterEmitter.h"
#include "InstrSelectorEmitter.h"
#include "DAGISelEmitter.h"
#include <algorithm>
#include <cstdio>
#include <fstream>
@ -34,6 +35,7 @@ enum ActionType {
GenEmitter,
GenRegisterEnums, GenRegister, GenRegisterHeader,
GenInstrEnums, GenInstrs, GenAsmWriter, GenInstrSelector,
GenDAGISel,
PrintEnums,
Parse
};
@ -59,6 +61,8 @@ namespace {
"Generate assembly writer"),
clEnumValN(GenInstrSelector, "gen-instr-selector",
"Generate an instruction selector"),
clEnumValN(GenDAGISel, "gen-dag-isel",
"Generate a DAG instruction selector"),
clEnumValN(PrintEnums, "print-enums",
"Print enum values for a class"),
clEnumValN(Parse, "parse",
@ -465,6 +469,9 @@ int main(int argc, char **argv) {
case GenInstrSelector:
InstrSelectorEmitter(Records).run(*Out);
break;
case GenDAGISel:
DAGISelEmitter(Records).run(*Out);
break;
case PrintEnums:
{
std::vector<Record*> Recs = Records.getAllDerivedDefinitions(Class);