mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-02-27 02:31:09 +00:00
Change the default of AsmWriterClassName and isMCAsmWriter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196065 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
5c2a1a302f
commit
4a6855441c
@ -949,7 +949,7 @@ class AsmWriter {
|
|||||||
// AsmWriterClassName - This specifies the suffix to use for the asmwriter
|
// AsmWriterClassName - This specifies the suffix to use for the asmwriter
|
||||||
// class. Generated AsmWriter classes are always prefixed with the target
|
// class. Generated AsmWriter classes are always prefixed with the target
|
||||||
// name.
|
// name.
|
||||||
string AsmWriterClassName = "AsmPrinter";
|
string AsmWriterClassName = "InstPrinter";
|
||||||
|
|
||||||
// Variant - AsmWriters can be of multiple different variants. Variants are
|
// Variant - AsmWriters can be of multiple different variants. Variants are
|
||||||
// used to support targets that need to emit assembly code in ways that are
|
// used to support targets that need to emit assembly code in ways that are
|
||||||
@ -973,7 +973,7 @@ class AsmWriter {
|
|||||||
// isMCAsmWriter - Is this assembly writer for an MC emitter? This controls
|
// isMCAsmWriter - Is this assembly writer for an MC emitter? This controls
|
||||||
// generation of the printInstruction() method. For MC printers, it takes
|
// generation of the printInstruction() method. For MC printers, it takes
|
||||||
// an MCInstr* operand, otherwise it takes a MachineInstr*.
|
// an MCInstr* operand, otherwise it takes a MachineInstr*.
|
||||||
bit isMCAsmWriter = 0;
|
bit isMCAsmWriter = 1;
|
||||||
}
|
}
|
||||||
def DefaultAsmWriter : AsmWriter;
|
def DefaultAsmWriter : AsmWriter;
|
||||||
|
|
||||||
|
@ -54,20 +54,10 @@ include "AArch64InstrInfo.td"
|
|||||||
|
|
||||||
def AArch64InstrInfo : InstrInfo;
|
def AArch64InstrInfo : InstrInfo;
|
||||||
|
|
||||||
//===----------------------------------------------------------------------===//
|
|
||||||
// Assembly printer
|
|
||||||
//===----------------------------------------------------------------------===//
|
|
||||||
|
|
||||||
def A64InstPrinter : AsmWriter {
|
|
||||||
string AsmWriterClassName = "InstPrinter";
|
|
||||||
bit isMCAsmWriter = 1;
|
|
||||||
}
|
|
||||||
|
|
||||||
//===----------------------------------------------------------------------===//
|
//===----------------------------------------------------------------------===//
|
||||||
// Declare the target which we are implementing
|
// Declare the target which we are implementing
|
||||||
//===----------------------------------------------------------------------===//
|
//===----------------------------------------------------------------------===//
|
||||||
|
|
||||||
def AArch64 : Target {
|
def AArch64 : Target {
|
||||||
let InstructionSet = AArch64InstrInfo;
|
let InstructionSet = AArch64InstrInfo;
|
||||||
let AssemblyWriters = [A64InstPrinter];
|
|
||||||
}
|
}
|
||||||
|
@ -391,17 +391,6 @@ include "ARMInstrInfo.td"
|
|||||||
|
|
||||||
def ARMInstrInfo : InstrInfo;
|
def ARMInstrInfo : InstrInfo;
|
||||||
|
|
||||||
|
|
||||||
//===----------------------------------------------------------------------===//
|
|
||||||
// Assembly printer
|
|
||||||
//===----------------------------------------------------------------------===//
|
|
||||||
// ARM Uses the MC printer for asm output, so make sure the TableGen
|
|
||||||
// AsmWriter bits get associated with the correct class.
|
|
||||||
def ARMAsmWriter : AsmWriter {
|
|
||||||
string AsmWriterClassName = "InstPrinter";
|
|
||||||
bit isMCAsmWriter = 1;
|
|
||||||
}
|
|
||||||
|
|
||||||
//===----------------------------------------------------------------------===//
|
//===----------------------------------------------------------------------===//
|
||||||
// Declare the target which we are implementing
|
// Declare the target which we are implementing
|
||||||
//===----------------------------------------------------------------------===//
|
//===----------------------------------------------------------------------===//
|
||||||
@ -409,6 +398,4 @@ def ARMAsmWriter : AsmWriter {
|
|||||||
def ARM : Target {
|
def ARM : Target {
|
||||||
// Pull in Instruction Info:
|
// Pull in Instruction Info:
|
||||||
let InstructionSet = ARMInstrInfo;
|
let InstructionSet = ARMInstrInfo;
|
||||||
|
|
||||||
let AssemblyWriters = [ARMAsmWriter];
|
|
||||||
}
|
}
|
||||||
|
@ -205,14 +205,6 @@ def : Proc<"hexagonv3", HexagonModel, [ArchV2, ArchV3]>;
|
|||||||
def : Proc<"hexagonv4", HexagonModelV4, [ArchV2, ArchV3, ArchV4]>;
|
def : Proc<"hexagonv4", HexagonModelV4, [ArchV2, ArchV3, ArchV4]>;
|
||||||
def : Proc<"hexagonv5", HexagonModelV4, [ArchV2, ArchV3, ArchV4, ArchV5]>;
|
def : Proc<"hexagonv5", HexagonModelV4, [ArchV2, ArchV3, ArchV4, ArchV5]>;
|
||||||
|
|
||||||
|
|
||||||
// Hexagon Uses the MC printer for assembler output, so make sure the TableGen
|
|
||||||
// AsmWriter bits get associated with the correct class.
|
|
||||||
def HexagonAsmWriter : AsmWriter {
|
|
||||||
string AsmWriterClassName = "InstPrinter";
|
|
||||||
bit isMCAsmWriter = 1;
|
|
||||||
}
|
|
||||||
|
|
||||||
//===----------------------------------------------------------------------===//
|
//===----------------------------------------------------------------------===//
|
||||||
// Declare the target which we are implementing
|
// Declare the target which we are implementing
|
||||||
//===----------------------------------------------------------------------===//
|
//===----------------------------------------------------------------------===//
|
||||||
@ -220,6 +212,4 @@ def HexagonAsmWriter : AsmWriter {
|
|||||||
def Hexagon : Target {
|
def Hexagon : Target {
|
||||||
// Pull in Instruction Info:
|
// Pull in Instruction Info:
|
||||||
let InstructionSet = HexagonInstrInfo;
|
let InstructionSet = HexagonInstrInfo;
|
||||||
|
|
||||||
let AssemblyWriters = [HexagonAsmWriter];
|
|
||||||
}
|
}
|
||||||
|
@ -50,17 +50,11 @@ include "MSP430InstrInfo.td"
|
|||||||
|
|
||||||
def MSP430InstrInfo : InstrInfo;
|
def MSP430InstrInfo : InstrInfo;
|
||||||
|
|
||||||
def MSP430InstPrinter : AsmWriter {
|
|
||||||
string AsmWriterClassName = "InstPrinter";
|
|
||||||
bit isMCAsmWriter = 1;
|
|
||||||
}
|
|
||||||
|
|
||||||
//===----------------------------------------------------------------------===//
|
//===----------------------------------------------------------------------===//
|
||||||
// Target Declaration
|
// Target Declaration
|
||||||
//===----------------------------------------------------------------------===//
|
//===----------------------------------------------------------------------===//
|
||||||
|
|
||||||
def MSP430 : Target {
|
def MSP430 : Target {
|
||||||
let InstructionSet = MSP430InstrInfo;
|
let InstructionSet = MSP430InstrInfo;
|
||||||
let AssemblyWriters = [MSP430InstPrinter];
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -96,11 +96,6 @@ def : Proc<"mips64", [FeatureMips64]>;
|
|||||||
def : Proc<"mips64r2", [FeatureMips64r2]>;
|
def : Proc<"mips64r2", [FeatureMips64r2]>;
|
||||||
def : Proc<"mips16", [FeatureMips16]>;
|
def : Proc<"mips16", [FeatureMips16]>;
|
||||||
|
|
||||||
def MipsAsmWriter : AsmWriter {
|
|
||||||
string AsmWriterClassName = "InstPrinter";
|
|
||||||
bit isMCAsmWriter = 1;
|
|
||||||
}
|
|
||||||
|
|
||||||
def MipsAsmParser : AsmParser {
|
def MipsAsmParser : AsmParser {
|
||||||
let ShouldEmitMatchRegisterName = 0;
|
let ShouldEmitMatchRegisterName = 0;
|
||||||
let MnemonicContainsDot = 1;
|
let MnemonicContainsDot = 1;
|
||||||
@ -116,6 +111,5 @@ def MipsAsmParserVariant : AsmParserVariant {
|
|||||||
def Mips : Target {
|
def Mips : Target {
|
||||||
let InstructionSet = MipsInstrInfo;
|
let InstructionSet = MipsInstrInfo;
|
||||||
let AssemblyParsers = [MipsAsmParser];
|
let AssemblyParsers = [MipsAsmParser];
|
||||||
let AssemblyWriters = [MipsAsmWriter];
|
|
||||||
let AssemblyParserVariants = [MipsAsmParserVariant];
|
let AssemblyParserVariants = [MipsAsmParserVariant];
|
||||||
}
|
}
|
||||||
|
@ -57,12 +57,6 @@ def : Proc<"sm_35", [SM35]>;
|
|||||||
def NVPTXInstrInfo : InstrInfo {
|
def NVPTXInstrInfo : InstrInfo {
|
||||||
}
|
}
|
||||||
|
|
||||||
def NVPTXAsmWriter : AsmWriter {
|
|
||||||
bit isMCAsmWriter = 1;
|
|
||||||
string AsmWriterClassName = "InstPrinter";
|
|
||||||
}
|
|
||||||
|
|
||||||
def NVPTX : Target {
|
def NVPTX : Target {
|
||||||
let InstructionSet = NVPTXInstrInfo;
|
let InstructionSet = NVPTXInstrInfo;
|
||||||
let AssemblyWriters = [NVPTXAsmWriter];
|
|
||||||
}
|
}
|
||||||
|
@ -285,11 +285,6 @@ def PPCInstrInfo : InstrInfo {
|
|||||||
let isLittleEndianEncoding = 1;
|
let isLittleEndianEncoding = 1;
|
||||||
}
|
}
|
||||||
|
|
||||||
def PPCAsmWriter : AsmWriter {
|
|
||||||
string AsmWriterClassName = "InstPrinter";
|
|
||||||
bit isMCAsmWriter = 1;
|
|
||||||
}
|
|
||||||
|
|
||||||
def PPCAsmParser : AsmParser {
|
def PPCAsmParser : AsmParser {
|
||||||
let ShouldEmitMatchRegisterName = 0;
|
let ShouldEmitMatchRegisterName = 0;
|
||||||
}
|
}
|
||||||
@ -307,7 +302,6 @@ def PPC : Target {
|
|||||||
// Information about the instructions.
|
// Information about the instructions.
|
||||||
let InstructionSet = PPCInstrInfo;
|
let InstructionSet = PPCInstrInfo;
|
||||||
|
|
||||||
let AssemblyWriters = [PPCAsmWriter];
|
|
||||||
let AssemblyParsers = [PPCAsmParser];
|
let AssemblyParsers = [PPCAsmParser];
|
||||||
let AssemblyParserVariants = [PPCAsmParserVariant];
|
let AssemblyParserVariants = [PPCAsmParserVariant];
|
||||||
}
|
}
|
||||||
|
@ -100,19 +100,9 @@ def AMDGPUInstrInfo : InstrInfo {
|
|||||||
let guessInstructionProperties = 1;
|
let guessInstructionProperties = 1;
|
||||||
}
|
}
|
||||||
|
|
||||||
//===----------------------------------------------------------------------===//
|
|
||||||
// Declare the target which we are implementing
|
|
||||||
//===----------------------------------------------------------------------===//
|
|
||||||
def AMDGPUAsmWriter : AsmWriter {
|
|
||||||
string AsmWriterClassName = "InstPrinter";
|
|
||||||
int Variant = 0;
|
|
||||||
bit isMCAsmWriter = 1;
|
|
||||||
}
|
|
||||||
|
|
||||||
def AMDGPU : Target {
|
def AMDGPU : Target {
|
||||||
// Pull in Instruction Info:
|
// Pull in Instruction Info:
|
||||||
let InstructionSet = AMDGPUInstrInfo;
|
let InstructionSet = AMDGPUInstrInfo;
|
||||||
let AssemblyWriters = [AMDGPUAsmWriter];
|
|
||||||
}
|
}
|
||||||
|
|
||||||
// Include AMDGPU TD files
|
// Include AMDGPU TD files
|
||||||
|
@ -66,6 +66,11 @@ def : Proc<"ultrasparc3", [FeatureV9, FeatureV8Deprecated]>;
|
|||||||
def : Proc<"ultrasparc3-vis", [FeatureV9, FeatureV8Deprecated, FeatureVIS]>;
|
def : Proc<"ultrasparc3-vis", [FeatureV9, FeatureV8Deprecated, FeatureVIS]>;
|
||||||
|
|
||||||
|
|
||||||
|
def SparcAsmWriter : AsmWriter {
|
||||||
|
string AsmWriterClassName = "AsmPrinter";
|
||||||
|
bit isMCAsmWriter = 0;
|
||||||
|
}
|
||||||
|
|
||||||
//===----------------------------------------------------------------------===//
|
//===----------------------------------------------------------------------===//
|
||||||
// Declare the target which we are implementing
|
// Declare the target which we are implementing
|
||||||
//===----------------------------------------------------------------------===//
|
//===----------------------------------------------------------------------===//
|
||||||
@ -73,4 +78,6 @@ def : Proc<"ultrasparc3-vis", [FeatureV9, FeatureV8Deprecated, FeatureVIS]>;
|
|||||||
def Sparc : Target {
|
def Sparc : Target {
|
||||||
// Pull in Instruction Info:
|
// Pull in Instruction Info:
|
||||||
let InstructionSet = SparcInstrInfo;
|
let InstructionSet = SparcInstrInfo;
|
||||||
|
|
||||||
|
let AssemblyWriters = [SparcAsmWriter];
|
||||||
}
|
}
|
||||||
|
@ -52,15 +52,6 @@ def SystemZAsmParser : AsmParser {
|
|||||||
let ShouldEmitMatchRegisterName = 0;
|
let ShouldEmitMatchRegisterName = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
//===----------------------------------------------------------------------===//
|
|
||||||
// Assembly writer
|
|
||||||
//===----------------------------------------------------------------------===//
|
|
||||||
|
|
||||||
def SystemZAsmWriter : AsmWriter {
|
|
||||||
string AsmWriterClassName = "InstPrinter";
|
|
||||||
bit isMCAsmWriter = 1;
|
|
||||||
}
|
|
||||||
|
|
||||||
//===----------------------------------------------------------------------===//
|
//===----------------------------------------------------------------------===//
|
||||||
// Top-level target declaration
|
// Top-level target declaration
|
||||||
//===----------------------------------------------------------------------===//
|
//===----------------------------------------------------------------------===//
|
||||||
@ -68,5 +59,4 @@ def SystemZAsmWriter : AsmWriter {
|
|||||||
def SystemZ : Target {
|
def SystemZ : Target {
|
||||||
let InstructionSet = SystemZInstrInfo;
|
let InstructionSet = SystemZInstrInfo;
|
||||||
let AssemblyParsers = [SystemZAsmParser];
|
let AssemblyParsers = [SystemZAsmParser];
|
||||||
let AssemblyWriters = [SystemZAsmWriter];
|
|
||||||
}
|
}
|
||||||
|
@ -396,12 +396,10 @@ def IntelAsmParserVariant : AsmParserVariant {
|
|||||||
def ATTAsmWriter : AsmWriter {
|
def ATTAsmWriter : AsmWriter {
|
||||||
string AsmWriterClassName = "ATTInstPrinter";
|
string AsmWriterClassName = "ATTInstPrinter";
|
||||||
int Variant = 0;
|
int Variant = 0;
|
||||||
bit isMCAsmWriter = 1;
|
|
||||||
}
|
}
|
||||||
def IntelAsmWriter : AsmWriter {
|
def IntelAsmWriter : AsmWriter {
|
||||||
string AsmWriterClassName = "IntelInstPrinter";
|
string AsmWriterClassName = "IntelInstPrinter";
|
||||||
int Variant = 1;
|
int Variant = 1;
|
||||||
bit isMCAsmWriter = 1;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
def X86 : Target {
|
def X86 : Target {
|
||||||
|
@ -41,13 +41,7 @@ def : Proc<"xs1b-generic", []>;
|
|||||||
// Declare the target which we are implementing
|
// Declare the target which we are implementing
|
||||||
//===----------------------------------------------------------------------===//
|
//===----------------------------------------------------------------------===//
|
||||||
|
|
||||||
def XCoreAsmWriter : AsmWriter {
|
|
||||||
string AsmWriterClassName = "InstPrinter";
|
|
||||||
bit isMCAsmWriter = 1;
|
|
||||||
}
|
|
||||||
|
|
||||||
def XCore : Target {
|
def XCore : Target {
|
||||||
// Pull in Instruction Info:
|
// Pull in Instruction Info:
|
||||||
let InstructionSet = XCoreInstrInfo;
|
let InstructionSet = XCoreInstrInfo;
|
||||||
let AssemblyWriters = [XCoreAsmWriter];
|
|
||||||
}
|
}
|
||||||
|
Loading…
x
Reference in New Issue
Block a user