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Add support for the VIA PadLock instructions.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128826 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Joerg Sonnenberger
2011-04-04 16:58:13 +00:00
parent 39d7caea69
commit 4a8ac8de1d
12 changed files with 165 additions and 14 deletions
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12
utils/TableGen/DisassemblerEmitter.cpp
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@@ -40,12 +40,12 @@ using namespace llvm::X86Disassembler;
/// all cases as a 64-bit instruction with only OPSIZE set. (The XS prefix
/// may have effects on its execution, but does not change the instruction
/// returned.) This allows considerable space savings in other tables.
/// - Four tables (ONEBYTE_SYM, TWOBYTE_SYM, THREEBYTE38_SYM, and
/// THREEBYTE3A_SYM) contain the hierarchy that the decoder traverses while
/// decoding an instruction. At the lowest level of this hierarchy are
/// instruction UIDs, 16-bit integers that can be used to uniquely identify
/// the instruction and correspond exactly to its position in the list of
/// CodeGenInstructions for the target.
/// - Six tables (ONEBYTE_SYM, TWOBYTE_SYM, THREEBYTE38_SYM, THREEBYTE3A_SYM,
/// THREEBYTEA6_SYM, and THREEBYTEA7_SYM contain the hierarchy that the
/// decoder traverses while decoding an instruction. At the lowest level of
/// this hierarchy are instruction UIDs, 16-bit integers that can be used to
/// uniquely identify the instruction and correspond exactly to its position
/// in the list of CodeGenInstructions for the target.
/// - One table (INSTRUCTIONS_SYM) contains information about the operands of
/// each instruction and how to decode them.
///