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Implement promotion for EXTRACT_VECTOR_ELT, allowing v16i8 multiplies to work with PowerPC.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27349 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2006-04-02 05:06:04 +00:00
parent c55bfd0265
commit 4aab2f4ab5
1 changed files with 27 additions and 16 deletions
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43
lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
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@ -194,6 +194,7 @@ private:
SDOperand &Lo, SDOperand &Hi); SDOperand &Lo, SDOperand &Hi);
SDOperand LowerVEXTRACT_VECTOR_ELT(SDOperand Op); SDOperand LowerVEXTRACT_VECTOR_ELT(SDOperand Op);
SDOperand ExpandEXTRACT_VECTOR_ELT(SDOperand Op);
SDOperand getIntPtrConstant(uint64_t Val) { SDOperand getIntPtrConstant(uint64_t Val) {
return DAG.getConstant(Val, TLI.getPointerTy()); return DAG.getConstant(Val, TLI.getPointerTy());
@ -901,24 +902,10 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
break; break;
} }
// FALLTHROUGH // FALLTHROUGH
case TargetLowering::Expand: { case TargetLowering::Expand:
// If the target doesn't support this, store the value to a temporary Result = ExpandEXTRACT_VECTOR_ELT(Result);
// stack slot, then LOAD the scalar element back out.
SDOperand StackPtr = CreateStackTemporary(Tmp1.getValueType());
SDOperand Ch = DAG.getNode(ISD::STORE, MVT::Other, DAG.getEntryNode(),
Tmp1, StackPtr, DAG.getSrcValue(NULL));
// Add the offset to the index.
unsigned EltSize = MVT::getSizeInBits(Result.getValueType())/8;
Tmp2 = DAG.getNode(ISD::MUL, Tmp2.getValueType(), Tmp2,
DAG.getConstant(EltSize, Tmp2.getValueType()));
StackPtr = DAG.getNode(ISD::ADD, Tmp2.getValueType(), Tmp2, StackPtr);
Result = DAG.getLoad(Result.getValueType(), Ch, StackPtr,
DAG.getSrcValue(NULL));
break; break;
} }
}
break; break;
case ISD::VEXTRACT_VECTOR_ELT: case ISD::VEXTRACT_VECTOR_ELT:
@ -2990,6 +2977,9 @@ SDOperand SelectionDAGLegalize::PromoteOp(SDOperand Op) {
case ISD::VEXTRACT_VECTOR_ELT: case ISD::VEXTRACT_VECTOR_ELT:
Result = PromoteOp(LowerVEXTRACT_VECTOR_ELT(Op)); Result = PromoteOp(LowerVEXTRACT_VECTOR_ELT(Op));
break; break;
case ISD::EXTRACT_VECTOR_ELT:
Result = PromoteOp(ExpandEXTRACT_VECTOR_ELT(Op));
break;
} }
assert(Result.Val && "Didn't set a result!"); assert(Result.Val && "Didn't set a result!");
@ -3048,6 +3038,27 @@ SDOperand SelectionDAGLegalize::LowerVEXTRACT_VECTOR_ELT(SDOperand Op) {
} }
} }
/// ExpandEXTRACT_VECTOR_ELT - Expand an EXTRACT_VECTOR_ELT operation into
/// memory traffic.
SDOperand SelectionDAGLegalize::ExpandEXTRACT_VECTOR_ELT(SDOperand Op) {
SDOperand Vector = Op.getOperand(0);
SDOperand Idx = Op.getOperand(1);
// If the target doesn't support this, store the value to a temporary
// stack slot, then LOAD the scalar element back out.
SDOperand StackPtr = CreateStackTemporary(Vector.getValueType());
SDOperand Ch = DAG.getNode(ISD::STORE, MVT::Other, DAG.getEntryNode(),
Vector, StackPtr, DAG.getSrcValue(NULL));
// Add the offset to the index.
unsigned EltSize = MVT::getSizeInBits(Op.getValueType())/8;
Idx = DAG.getNode(ISD::MUL, Idx.getValueType(), Idx,
DAG.getConstant(EltSize, Idx.getValueType()));
StackPtr = DAG.getNode(ISD::ADD, Idx.getValueType(), Idx, StackPtr);
return DAG.getLoad(Op.getValueType(), Ch, StackPtr, DAG.getSrcValue(NULL));
}
/// LegalizeSetCCOperands - Attempts to create a legal LHS and RHS for a SETCC /// LegalizeSetCCOperands - Attempts to create a legal LHS and RHS for a SETCC
/// with condition CC on the current target. This usually involves legalizing /// with condition CC on the current target. This usually involves legalizing