From 4aafb4ff92ee6b5372aaaa51845445f2418a7fd1 Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Thu, 12 Jan 2006 20:22:43 +0000 Subject: [PATCH] Add a simple missing fold to produce this: subfic r3, r2, 33 instead of this: subfic r2, r2, 32 addi r3, r2, 1 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25255 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index cb80e250380..9203c81f557 100644 --- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -696,6 +696,14 @@ SDOperand DAGCombiner::visitADD(SDNode *N) { return DAG.getNode(ISD::ADD, VT, N0.getOperand(0), DAG.getConstant(N1C->getValue()+N01C->getValue(), VT)); } + + // fold ((c1-A)+c2) -> (c1+c2)-A + if (N1C && N0.getOpcode() == ISD::SUB) + if (ConstantSDNode *N0C = dyn_cast(N0.getOperand(0))) + return DAG.getNode(ISD::SUB, VT, + DAG.getConstant(N1C->getValue()+N0C->getValue(), VT), + N0.getOperand(1)); + // fold ((0-A) + B) -> B-A if (N0.getOpcode() == ISD::SUB && isa(N0.getOperand(0)) && cast(N0.getOperand(0))->isNullValue())