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https://github.com/c64scene-ar/llvm-6502.git
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Convert several loops over MachineFunction basic blocks to range-based loops
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207683 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -224,9 +224,8 @@ ComputeCallSiteTable(SmallVectorImpl<CallSiteEntry> &CallSites,
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bool PreviousIsInvoke = false;
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// Visit all instructions in order of address.
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for (MachineFunction::const_iterator I = Asm->MF->begin(), E = Asm->MF->end();
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I != E; ++I) {
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for (MachineBasicBlock::const_iterator MI = I->begin(), E = I->end();
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for (const auto &MBB : *Asm->MF) {
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for (MachineBasicBlock::const_iterator MI = MBB.begin(), E = MBB.end();
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MI != E; ++MI) {
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if (!MI->isEHLabel()) {
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if (MI->isCall())
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@ -41,9 +41,7 @@ bool EdgeBundles::runOnMachineFunction(MachineFunction &mf) {
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EC.clear();
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EC.grow(2 * MF->getNumBlockIDs());
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for (MachineFunction::const_iterator I = MF->begin(), E = MF->end(); I != E;
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++I) {
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const MachineBasicBlock &MBB = *I;
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for (const auto &MBB : *MF) {
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unsigned OutE = 2 * MBB.getNumber() + 1;
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// Join the outgoing bundle with the ingoing bundles of all successors.
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for (MachineBasicBlock::const_succ_iterator SI = MBB.succ_begin(),
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@ -78,14 +76,13 @@ raw_ostream &WriteGraph<>(raw_ostream &O, const EdgeBundles &G,
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const MachineFunction *MF = G.getMachineFunction();
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O << "digraph {\n";
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for (MachineFunction::const_iterator I = MF->begin(), E = MF->end();
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I != E; ++I) {
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unsigned BB = I->getNumber();
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for (const auto &MBB : *MF) {
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unsigned BB = MBB.getNumber();
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O << "\t\"BB#" << BB << "\" [ shape=box ]\n"
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<< '\t' << G.getBundle(BB, false) << " -> \"BB#" << BB << "\"\n"
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<< "\t\"BB#" << BB << "\" -> " << G.getBundle(BB, true) << '\n';
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for (MachineBasicBlock::const_succ_iterator SI = I->succ_begin(),
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SE = I->succ_end(); SI != SE; ++SI)
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for (MachineBasicBlock::const_succ_iterator SI = MBB.succ_begin(),
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SE = MBB.succ_end(); SI != SE; ++SI)
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O << "\t\"BB#" << BB << "\" -> \"BB#" << (*SI)->getNumber()
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<< "\" [ color=lightgray ]\n";
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}
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@ -59,12 +59,11 @@ void LexicalScopes::extractLexicalScopes(
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DenseMap<const MachineInstr *, LexicalScope *> &MI2ScopeMap) {
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// Scan each instruction and create scopes. First build working set of scopes.
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for (MachineFunction::const_iterator I = MF->begin(), E = MF->end(); I != E;
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++I) {
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for (const auto &MBB : *MF) {
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const MachineInstr *RangeBeginMI = nullptr;
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const MachineInstr *PrevMI = nullptr;
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DebugLoc PrevDL;
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for (MachineBasicBlock::const_iterator II = I->begin(), IE = I->end();
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for (MachineBasicBlock::const_iterator II = MBB.begin(), IE = MBB.end();
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II != IE; ++II) {
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const MachineInstr *MInsn = II;
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@ -274,9 +273,8 @@ void LexicalScopes::getMachineBasicBlocks(
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return;
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if (Scope == CurrentFnLexicalScope) {
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for (MachineFunction::const_iterator I = MF->begin(), E = MF->end(); I != E;
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++I)
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MBBs.insert(I);
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for (const auto &MBB : *MF)
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MBBs.insert(&MBB);
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return;
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}
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@ -701,9 +701,8 @@ void LiveVariables::removeVirtualRegistersKilled(MachineInstr *MI) {
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/// which is used in a PHI node. We map that to the BB the vreg is coming from.
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///
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void LiveVariables::analyzePHINodes(const MachineFunction& Fn) {
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for (MachineFunction::const_iterator I = Fn.begin(), E = Fn.end();
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I != E; ++I)
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for (MachineBasicBlock::const_iterator BBI = I->begin(), BBE = I->end();
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for (const auto &MBB : Fn)
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for (MachineBasicBlock::const_iterator BBI = MBB.begin(), BBE = MBB.end();
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BBI != BBE && BBI->isPHI(); ++BBI)
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for (unsigned i = 1, e = BBI->getNumOperands(); i != e; i += 2)
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if (BBI->getOperand(i).readsReg())
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@ -365,9 +365,9 @@ void MachineFunction::print(raw_ostream &OS, SlotIndexes *Indexes) const {
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OS << '\n';
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}
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for (const_iterator BB = begin(), E = end(); BB != E; ++BB) {
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for (const auto &BB : *this) {
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OS << '\n';
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BB->print(OS, Indexes);
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BB.print(OS, Indexes);
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}
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OS << "\n# End machine code for function " << getName() << ".\n\n";
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@ -470,18 +470,17 @@ void MachineVerifier::visitMachineFunctionBefore() {
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// Build a set of the basic blocks in the function.
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FunctionBlocks.clear();
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for (MachineFunction::const_iterator
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I = MF->begin(), E = MF->end(); I != E; ++I) {
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FunctionBlocks.insert(I);
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BBInfo &MInfo = MBBInfoMap[I];
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for (const auto &MBB : *MF) {
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FunctionBlocks.insert(&MBB);
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BBInfo &MInfo = MBBInfoMap[&MBB];
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MInfo.Preds.insert(I->pred_begin(), I->pred_end());
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if (MInfo.Preds.size() != I->pred_size())
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report("MBB has duplicate entries in its predecessor list.", I);
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MInfo.Preds.insert(MBB.pred_begin(), MBB.pred_end());
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if (MInfo.Preds.size() != MBB.pred_size())
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report("MBB has duplicate entries in its predecessor list.", &MBB);
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MInfo.Succs.insert(I->succ_begin(), I->succ_end());
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if (MInfo.Succs.size() != I->succ_size())
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report("MBB has duplicate entries in its successor list.", I);
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MInfo.Succs.insert(MBB.succ_begin(), MBB.succ_end());
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if (MInfo.Succs.size() != MBB.succ_size())
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report("MBB has duplicate entries in its successor list.", &MBB);
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}
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// Check that the register use lists are sane.
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@ -1159,9 +1158,7 @@ void MachineVerifier::calcRegsPassed() {
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// First push live-out regs to successors' vregsPassed. Remember the MBBs that
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// have any vregsPassed.
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SmallPtrSet<const MachineBasicBlock*, 8> todo;
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for (MachineFunction::const_iterator MFI = MF->begin(), MFE = MF->end();
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MFI != MFE; ++MFI) {
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const MachineBasicBlock &MBB(*MFI);
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for (const auto &MBB : *MF) {
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BBInfo &MInfo = MBBInfoMap[&MBB];
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if (!MInfo.reachable)
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continue;
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@ -1196,9 +1193,7 @@ void MachineVerifier::calcRegsPassed() {
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void MachineVerifier::calcRegsRequired() {
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// First push live-in regs to predecessors' vregsRequired.
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SmallPtrSet<const MachineBasicBlock*, 8> todo;
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for (MachineFunction::const_iterator MFI = MF->begin(), MFE = MF->end();
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MFI != MFE; ++MFI) {
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const MachineBasicBlock &MBB(*MFI);
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for (const auto &MBB : *MF) {
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BBInfo &MInfo = MBBInfoMap[&MBB];
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for (MachineBasicBlock::const_pred_iterator PrI = MBB.pred_begin(),
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PrE = MBB.pred_end(); PrI != PrE; ++PrI) {
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@ -1260,29 +1255,27 @@ void MachineVerifier::checkPHIOps(const MachineBasicBlock *MBB) {
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void MachineVerifier::visitMachineFunctionAfter() {
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calcRegsPassed();
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for (MachineFunction::const_iterator MFI = MF->begin(), MFE = MF->end();
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MFI != MFE; ++MFI) {
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BBInfo &MInfo = MBBInfoMap[MFI];
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for (const auto &MBB : *MF) {
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BBInfo &MInfo = MBBInfoMap[&MBB];
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// Skip unreachable MBBs.
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if (!MInfo.reachable)
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continue;
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checkPHIOps(MFI);
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checkPHIOps(&MBB);
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}
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// Now check liveness info if available
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calcRegsRequired();
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// Check for killed virtual registers that should be live out.
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for (MachineFunction::const_iterator MFI = MF->begin(), MFE = MF->end();
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MFI != MFE; ++MFI) {
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BBInfo &MInfo = MBBInfoMap[MFI];
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for (const auto &MBB : *MF) {
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BBInfo &MInfo = MBBInfoMap[&MBB];
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for (RegSet::iterator
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I = MInfo.vregsRequired.begin(), E = MInfo.vregsRequired.end(); I != E;
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++I)
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if (MInfo.regsKilled.count(*I)) {
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report("Virtual register killed in block, but needed live out.", MFI);
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report("Virtual register killed in block, but needed live out.", &MBB);
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*OS << "Virtual register " << PrintReg(*I)
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<< " is used after the block.\n";
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}
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@ -1308,20 +1301,19 @@ void MachineVerifier::verifyLiveVariables() {
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for (unsigned i = 0, e = MRI->getNumVirtRegs(); i != e; ++i) {
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unsigned Reg = TargetRegisterInfo::index2VirtReg(i);
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LiveVariables::VarInfo &VI = LiveVars->getVarInfo(Reg);
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for (MachineFunction::const_iterator MFI = MF->begin(), MFE = MF->end();
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MFI != MFE; ++MFI) {
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BBInfo &MInfo = MBBInfoMap[MFI];
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for (const auto &MBB : *MF) {
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BBInfo &MInfo = MBBInfoMap[&MBB];
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// Our vregsRequired should be identical to LiveVariables' AliveBlocks
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if (MInfo.vregsRequired.count(Reg)) {
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if (!VI.AliveBlocks.test(MFI->getNumber())) {
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report("LiveVariables: Block missing from AliveBlocks", MFI);
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if (!VI.AliveBlocks.test(MBB.getNumber())) {
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report("LiveVariables: Block missing from AliveBlocks", &MBB);
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*OS << "Virtual register " << PrintReg(Reg)
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<< " must be live through the block.\n";
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}
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} else {
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if (VI.AliveBlocks.test(MFI->getNumber())) {
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report("LiveVariables: Block should not be in AliveBlocks", MFI);
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if (VI.AliveBlocks.test(MBB.getNumber())) {
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report("LiveVariables: Block should not be in AliveBlocks", &MBB);
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*OS << "Virtual register " << PrintReg(Reg)
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<< " is not needed live through the block.\n";
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}
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@ -532,9 +532,8 @@ void PHIElimination::LowerPHINode(MachineBasicBlock &MBB,
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/// used later to determine when the vreg is killed in the BB.
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///
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void PHIElimination::analyzePHINodes(const MachineFunction& MF) {
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for (MachineFunction::const_iterator I = MF.begin(), E = MF.end();
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I != E; ++I)
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for (MachineBasicBlock::const_iterator BBI = I->begin(), BBE = I->end();
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for (const auto &MBB : MF)
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for (MachineBasicBlock::const_iterator BBI = MBB.begin(), BBE = MBB.end();
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BBI != BBE && BBI->isPHI(); ++BBI)
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for (unsigned i = 1, e = BBI->getNumOperands(); i != e; i += 2)
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++VRegPHIUseCount[BBVRegPair(BBI->getOperand(i+1).getMBB()->getNumber(),
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