Convert several loops over MachineFunction basic blocks to range-based loops

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207683 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Alexey Samsonov 2014-04-30 18:29:51 +00:00
parent 78ecea93a3
commit 4aef7270c9
7 changed files with 40 additions and 56 deletions

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@ -224,9 +224,8 @@ ComputeCallSiteTable(SmallVectorImpl<CallSiteEntry> &CallSites,
bool PreviousIsInvoke = false;
// Visit all instructions in order of address.
for (MachineFunction::const_iterator I = Asm->MF->begin(), E = Asm->MF->end();
I != E; ++I) {
for (MachineBasicBlock::const_iterator MI = I->begin(), E = I->end();
for (const auto &MBB : *Asm->MF) {
for (MachineBasicBlock::const_iterator MI = MBB.begin(), E = MBB.end();
MI != E; ++MI) {
if (!MI->isEHLabel()) {
if (MI->isCall())

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@ -41,9 +41,7 @@ bool EdgeBundles::runOnMachineFunction(MachineFunction &mf) {
EC.clear();
EC.grow(2 * MF->getNumBlockIDs());
for (MachineFunction::const_iterator I = MF->begin(), E = MF->end(); I != E;
++I) {
const MachineBasicBlock &MBB = *I;
for (const auto &MBB : *MF) {
unsigned OutE = 2 * MBB.getNumber() + 1;
// Join the outgoing bundle with the ingoing bundles of all successors.
for (MachineBasicBlock::const_succ_iterator SI = MBB.succ_begin(),
@ -78,14 +76,13 @@ raw_ostream &WriteGraph<>(raw_ostream &O, const EdgeBundles &G,
const MachineFunction *MF = G.getMachineFunction();
O << "digraph {\n";
for (MachineFunction::const_iterator I = MF->begin(), E = MF->end();
I != E; ++I) {
unsigned BB = I->getNumber();
for (const auto &MBB : *MF) {
unsigned BB = MBB.getNumber();
O << "\t\"BB#" << BB << "\" [ shape=box ]\n"
<< '\t' << G.getBundle(BB, false) << " -> \"BB#" << BB << "\"\n"
<< "\t\"BB#" << BB << "\" -> " << G.getBundle(BB, true) << '\n';
for (MachineBasicBlock::const_succ_iterator SI = I->succ_begin(),
SE = I->succ_end(); SI != SE; ++SI)
for (MachineBasicBlock::const_succ_iterator SI = MBB.succ_begin(),
SE = MBB.succ_end(); SI != SE; ++SI)
O << "\t\"BB#" << BB << "\" -> \"BB#" << (*SI)->getNumber()
<< "\" [ color=lightgray ]\n";
}

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@ -59,12 +59,11 @@ void LexicalScopes::extractLexicalScopes(
DenseMap<const MachineInstr *, LexicalScope *> &MI2ScopeMap) {
// Scan each instruction and create scopes. First build working set of scopes.
for (MachineFunction::const_iterator I = MF->begin(), E = MF->end(); I != E;
++I) {
for (const auto &MBB : *MF) {
const MachineInstr *RangeBeginMI = nullptr;
const MachineInstr *PrevMI = nullptr;
DebugLoc PrevDL;
for (MachineBasicBlock::const_iterator II = I->begin(), IE = I->end();
for (MachineBasicBlock::const_iterator II = MBB.begin(), IE = MBB.end();
II != IE; ++II) {
const MachineInstr *MInsn = II;
@ -274,9 +273,8 @@ void LexicalScopes::getMachineBasicBlocks(
return;
if (Scope == CurrentFnLexicalScope) {
for (MachineFunction::const_iterator I = MF->begin(), E = MF->end(); I != E;
++I)
MBBs.insert(I);
for (const auto &MBB : *MF)
MBBs.insert(&MBB);
return;
}

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@ -701,9 +701,8 @@ void LiveVariables::removeVirtualRegistersKilled(MachineInstr *MI) {
/// which is used in a PHI node. We map that to the BB the vreg is coming from.
///
void LiveVariables::analyzePHINodes(const MachineFunction& Fn) {
for (MachineFunction::const_iterator I = Fn.begin(), E = Fn.end();
I != E; ++I)
for (MachineBasicBlock::const_iterator BBI = I->begin(), BBE = I->end();
for (const auto &MBB : Fn)
for (MachineBasicBlock::const_iterator BBI = MBB.begin(), BBE = MBB.end();
BBI != BBE && BBI->isPHI(); ++BBI)
for (unsigned i = 1, e = BBI->getNumOperands(); i != e; i += 2)
if (BBI->getOperand(i).readsReg())

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@ -365,9 +365,9 @@ void MachineFunction::print(raw_ostream &OS, SlotIndexes *Indexes) const {
OS << '\n';
}
for (const_iterator BB = begin(), E = end(); BB != E; ++BB) {
for (const auto &BB : *this) {
OS << '\n';
BB->print(OS, Indexes);
BB.print(OS, Indexes);
}
OS << "\n# End machine code for function " << getName() << ".\n\n";

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@ -470,18 +470,17 @@ void MachineVerifier::visitMachineFunctionBefore() {
// Build a set of the basic blocks in the function.
FunctionBlocks.clear();
for (MachineFunction::const_iterator
I = MF->begin(), E = MF->end(); I != E; ++I) {
FunctionBlocks.insert(I);
BBInfo &MInfo = MBBInfoMap[I];
for (const auto &MBB : *MF) {
FunctionBlocks.insert(&MBB);
BBInfo &MInfo = MBBInfoMap[&MBB];
MInfo.Preds.insert(I->pred_begin(), I->pred_end());
if (MInfo.Preds.size() != I->pred_size())
report("MBB has duplicate entries in its predecessor list.", I);
MInfo.Preds.insert(MBB.pred_begin(), MBB.pred_end());
if (MInfo.Preds.size() != MBB.pred_size())
report("MBB has duplicate entries in its predecessor list.", &MBB);
MInfo.Succs.insert(I->succ_begin(), I->succ_end());
if (MInfo.Succs.size() != I->succ_size())
report("MBB has duplicate entries in its successor list.", I);
MInfo.Succs.insert(MBB.succ_begin(), MBB.succ_end());
if (MInfo.Succs.size() != MBB.succ_size())
report("MBB has duplicate entries in its successor list.", &MBB);
}
// Check that the register use lists are sane.
@ -1159,9 +1158,7 @@ void MachineVerifier::calcRegsPassed() {
// First push live-out regs to successors' vregsPassed. Remember the MBBs that
// have any vregsPassed.
SmallPtrSet<const MachineBasicBlock*, 8> todo;
for (MachineFunction::const_iterator MFI = MF->begin(), MFE = MF->end();
MFI != MFE; ++MFI) {
const MachineBasicBlock &MBB(*MFI);
for (const auto &MBB : *MF) {
BBInfo &MInfo = MBBInfoMap[&MBB];
if (!MInfo.reachable)
continue;
@ -1196,9 +1193,7 @@ void MachineVerifier::calcRegsPassed() {
void MachineVerifier::calcRegsRequired() {
// First push live-in regs to predecessors' vregsRequired.
SmallPtrSet<const MachineBasicBlock*, 8> todo;
for (MachineFunction::const_iterator MFI = MF->begin(), MFE = MF->end();
MFI != MFE; ++MFI) {
const MachineBasicBlock &MBB(*MFI);
for (const auto &MBB : *MF) {
BBInfo &MInfo = MBBInfoMap[&MBB];
for (MachineBasicBlock::const_pred_iterator PrI = MBB.pred_begin(),
PrE = MBB.pred_end(); PrI != PrE; ++PrI) {
@ -1260,29 +1255,27 @@ void MachineVerifier::checkPHIOps(const MachineBasicBlock *MBB) {
void MachineVerifier::visitMachineFunctionAfter() {
calcRegsPassed();
for (MachineFunction::const_iterator MFI = MF->begin(), MFE = MF->end();
MFI != MFE; ++MFI) {
BBInfo &MInfo = MBBInfoMap[MFI];
for (const auto &MBB : *MF) {
BBInfo &MInfo = MBBInfoMap[&MBB];
// Skip unreachable MBBs.
if (!MInfo.reachable)
continue;
checkPHIOps(MFI);
checkPHIOps(&MBB);
}
// Now check liveness info if available
calcRegsRequired();
// Check for killed virtual registers that should be live out.
for (MachineFunction::const_iterator MFI = MF->begin(), MFE = MF->end();
MFI != MFE; ++MFI) {
BBInfo &MInfo = MBBInfoMap[MFI];
for (const auto &MBB : *MF) {
BBInfo &MInfo = MBBInfoMap[&MBB];
for (RegSet::iterator
I = MInfo.vregsRequired.begin(), E = MInfo.vregsRequired.end(); I != E;
++I)
if (MInfo.regsKilled.count(*I)) {
report("Virtual register killed in block, but needed live out.", MFI);
report("Virtual register killed in block, but needed live out.", &MBB);
*OS << "Virtual register " << PrintReg(*I)
<< " is used after the block.\n";
}
@ -1308,20 +1301,19 @@ void MachineVerifier::verifyLiveVariables() {
for (unsigned i = 0, e = MRI->getNumVirtRegs(); i != e; ++i) {
unsigned Reg = TargetRegisterInfo::index2VirtReg(i);
LiveVariables::VarInfo &VI = LiveVars->getVarInfo(Reg);
for (MachineFunction::const_iterator MFI = MF->begin(), MFE = MF->end();
MFI != MFE; ++MFI) {
BBInfo &MInfo = MBBInfoMap[MFI];
for (const auto &MBB : *MF) {
BBInfo &MInfo = MBBInfoMap[&MBB];
// Our vregsRequired should be identical to LiveVariables' AliveBlocks
if (MInfo.vregsRequired.count(Reg)) {
if (!VI.AliveBlocks.test(MFI->getNumber())) {
report("LiveVariables: Block missing from AliveBlocks", MFI);
if (!VI.AliveBlocks.test(MBB.getNumber())) {
report("LiveVariables: Block missing from AliveBlocks", &MBB);
*OS << "Virtual register " << PrintReg(Reg)
<< " must be live through the block.\n";
}
} else {
if (VI.AliveBlocks.test(MFI->getNumber())) {
report("LiveVariables: Block should not be in AliveBlocks", MFI);
if (VI.AliveBlocks.test(MBB.getNumber())) {
report("LiveVariables: Block should not be in AliveBlocks", &MBB);
*OS << "Virtual register " << PrintReg(Reg)
<< " is not needed live through the block.\n";
}

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@ -532,9 +532,8 @@ void PHIElimination::LowerPHINode(MachineBasicBlock &MBB,
/// used later to determine when the vreg is killed in the BB.
///
void PHIElimination::analyzePHINodes(const MachineFunction& MF) {
for (MachineFunction::const_iterator I = MF.begin(), E = MF.end();
I != E; ++I)
for (MachineBasicBlock::const_iterator BBI = I->begin(), BBE = I->end();
for (const auto &MBB : MF)
for (MachineBasicBlock::const_iterator BBI = MBB.begin(), BBE = MBB.end();
BBI != BBE && BBI->isPHI(); ++BBI)
for (unsigned i = 1, e = BBI->getNumOperands(); i != e; i += 2)
++VRegPHIUseCount[BBVRegPair(BBI->getOperand(i+1).getMBB()->getNumber(),