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https://github.com/c64scene-ar/llvm-6502.git
synced 2025-09-24 23:28:41 +00:00
[C++11] More 'nullptr' conversion. In some cases just using a boolean check instead of comparing to nullptr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206142 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -56,7 +56,7 @@ ScheduleDAGInstrs::ScheduleDAGInstrs(MachineFunction &mf,
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LiveIntervals *lis)
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: ScheduleDAG(mf), MLI(mli), MDT(mdt), MFI(mf.getFrameInfo()), LIS(lis),
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IsPostRA(IsPostRAFlag), RemoveKillFlags(RemoveKillFlags),
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CanHandleTerminators(false), FirstDbgValue(0) {
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CanHandleTerminators(false), FirstDbgValue(nullptr) {
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assert((IsPostRA || LIS) && "PreRA scheduling requires LiveIntervals");
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DbgValues.clear();
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assert(!(IsPostRA && MRI.getNumVirtRegs()) &&
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@@ -177,7 +177,7 @@ void ScheduleDAGInstrs::startBlock(MachineBasicBlock *bb) {
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void ScheduleDAGInstrs::finishBlock() {
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// Subclasses should no longer refer to the old block.
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BB = 0;
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BB = nullptr;
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}
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/// Initialize the DAG and common scheduler state for the current scheduling
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@@ -209,7 +209,7 @@ void ScheduleDAGInstrs::exitRegion() {
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/// are too high to be hidden by the branch or when the liveout registers
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/// used by instructions in the fallthrough block.
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void ScheduleDAGInstrs::addSchedBarrierDeps() {
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MachineInstr *ExitMI = RegionEnd != BB->end() ? &*RegionEnd : 0;
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MachineInstr *ExitMI = RegionEnd != BB->end() ? &*RegionEnd : nullptr;
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ExitSU.setInstr(ExitMI);
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bool AllDepKnown = ExitMI &&
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(ExitMI->isCall() || ExitMI->isBarrier());
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@@ -266,7 +266,7 @@ void ScheduleDAGInstrs::addPhysRegDataDeps(SUnit *SU, unsigned OperIdx) {
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// Adjust the dependence latency using operand def/use information,
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// then allow the target to perform its own adjustments.
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int UseOp = I->OpIdx;
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MachineInstr *RegUse = 0;
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MachineInstr *RegUse = nullptr;
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SDep Dep;
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if (UseOp < 0)
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Dep = SDep(SU, SDep::Artificial);
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@@ -560,9 +560,9 @@ static bool MIsNeedChainEdge(AliasAnalysis *AA, const MachineFrameInfo *MFI,
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AliasAnalysis::AliasResult AAResult = AA->alias(
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AliasAnalysis::Location(MMOa->getValue(), Overlapa,
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UseTBAA ? MMOa->getTBAAInfo() : 0),
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UseTBAA ? MMOa->getTBAAInfo() : nullptr),
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AliasAnalysis::Location(MMOb->getValue(), Overlapb,
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UseTBAA ? MMOb->getTBAAInfo() : 0));
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UseTBAA ? MMOb->getTBAAInfo() : nullptr));
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return (AAResult != AliasAnalysis::NoAlias);
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}
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@@ -730,7 +730,7 @@ void ScheduleDAGInstrs::buildSchedGraph(AliasAnalysis *AA,
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const TargetSubtargetInfo &ST = TM.getSubtarget<TargetSubtargetInfo>();
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bool UseAA = EnableAASchedMI.getNumOccurrences() > 0 ? EnableAASchedMI
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: ST.useAA();
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AliasAnalysis *AAForDep = UseAA ? AA : 0;
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AliasAnalysis *AAForDep = UseAA ? AA : nullptr;
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MISUnitMap.clear();
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ScheduleDAG::clearDAG();
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@@ -745,7 +745,7 @@ void ScheduleDAGInstrs::buildSchedGraph(AliasAnalysis *AA,
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// to top.
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// Remember where a generic side-effecting instruction is as we procede.
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SUnit *BarrierChain = 0, *AliasChain = 0;
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SUnit *BarrierChain = nullptr, *AliasChain = nullptr;
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// Memory references to specific known memory locations are tracked
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// so that they can be given more precise dependencies. We track
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@@ -758,7 +758,7 @@ void ScheduleDAGInstrs::buildSchedGraph(AliasAnalysis *AA,
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// Remove any stale debug info; sometimes BuildSchedGraph is called again
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// without emitting the info from the previous call.
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DbgValues.clear();
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FirstDbgValue = NULL;
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FirstDbgValue = nullptr;
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assert(Defs.empty() && Uses.empty() &&
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"Only BuildGraph should update Defs/Uses");
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@@ -775,13 +775,13 @@ void ScheduleDAGInstrs::buildSchedGraph(AliasAnalysis *AA,
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addSchedBarrierDeps();
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// Walk the list of instructions, from bottom moving up.
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MachineInstr *DbgMI = NULL;
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MachineInstr *DbgMI = nullptr;
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for (MachineBasicBlock::iterator MII = RegionEnd, MIE = RegionBegin;
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MII != MIE; --MII) {
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MachineInstr *MI = std::prev(MII);
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if (MI && DbgMI) {
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DbgValues.push_back(std::make_pair(DbgMI, MI));
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DbgMI = NULL;
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DbgMI = nullptr;
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}
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if (MI->isDebugValue()) {
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@@ -792,8 +792,8 @@ void ScheduleDAGInstrs::buildSchedGraph(AliasAnalysis *AA,
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assert(SU && "No SUnit mapped to this MI");
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if (RPTracker) {
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PressureDiff *PDiff = PDiffs ? &(*PDiffs)[SU->NodeNum] : 0;
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RPTracker->recede(/*LiveUses=*/0, PDiff);
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PressureDiff *PDiff = PDiffs ? &(*PDiffs)[SU->NodeNum] : nullptr;
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RPTracker->recede(/*LiveUses=*/nullptr, PDiff);
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assert(RPTracker->getPos() == std::prev(MII) &&
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"RPTracker can't find MI");
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}
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@@ -1423,7 +1423,7 @@ public:
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const SDep *backtrack() {
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DFSStack.pop_back();
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return DFSStack.empty() ? 0 : std::prev(DFSStack.back().second);
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return DFSStack.empty() ? nullptr : std::prev(DFSStack.back().second);
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}
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const SUnit *getCurr() const { return DFSStack.back().first; }
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