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Hexagon: Remove unused variables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146846 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -295,7 +295,6 @@ static bool OffsetFitsS11(EVT MemType, int64_t Offset) {
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// CONST32.
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//
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SDNode *HexagonDAGToDAGISel::SelectBaseOffsetLoad(LoadSDNode *LD, DebugLoc dl) {
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EVT LoadedVT = LD->getMemoryVT();
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SDValue Chain = LD->getChain();
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SDNode* Const32 = LD->getBasePtr().getNode();
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unsigned Opcode = 0;
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@ -767,7 +766,6 @@ SDNode *HexagonDAGToDAGISel::SelectMul(SDNode *N) {
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SelectCode(N);
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}
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SDValue Base = LD->getBasePtr();
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SDValue Chain = LD->getChain();
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SDValue TargetConst0 = CurDAG->getTargetConstant(0, MVT::i32);
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OP0 = SDValue (CurDAG->getMachineNode(Hexagon::LDriw, dl, MVT::i32,
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@ -794,7 +792,6 @@ SDNode *HexagonDAGToDAGISel::SelectMul(SDNode *N) {
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return SelectCode(N);
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}
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SDValue Base = LD->getBasePtr();
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SDValue Chain = LD->getChain();
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SDValue TargetConst0 = CurDAG->getTargetConstant(0, MVT::i32);
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OP1 = SDValue (CurDAG->getMachineNode(Hexagon::LDriw, dl, MVT::i32,
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@ -949,7 +946,6 @@ SDNode *HexagonDAGToDAGISel::SelectTruncate(SDNode *N) {
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return SelectCode(N);
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}
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SDValue Base = LD->getBasePtr();
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SDValue Chain = LD->getChain();
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SDValue TargetConst0 = CurDAG->getTargetConstant(0, MVT::i32);
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OP0 = SDValue (CurDAG->getMachineNode(Hexagon::LDriw, dl, MVT::i32,
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@ -975,7 +971,6 @@ SDNode *HexagonDAGToDAGISel::SelectTruncate(SDNode *N) {
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return SelectCode(N);
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}
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SDValue Base = LD->getBasePtr();
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SDValue Chain = LD->getChain();
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SDValue TargetConst0 = CurDAG->getTargetConstant(0, MVT::i32);
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OP1 = SDValue (CurDAG->getMachineNode(Hexagon::LDriw, dl, MVT::i32,
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@ -1175,9 +1170,6 @@ SDNode *HexagonDAGToDAGISel::SelectConstant(SDNode *N) {
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SDNode* Result;
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int32_t Val = cast<ConstantSDNode>(N)->getSExtValue();
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if (Val == -1) {
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unsigned NewIntReg = TM.getInstrInfo()->createVR(MF, MVT(MVT::i32));
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SDValue Reg = CurDAG->getRegister(NewIntReg, MVT::i32);
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// Create the IntReg = 1 node.
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SDNode* IntRegTFR =
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CurDAG->getMachineNode(Hexagon::TFRI, dl, MVT::i32,
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@ -305,9 +305,6 @@ HexagonTargetLowering::LowerReturn(SDValue Chain,
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// Analyze return values of ISD::RET
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CCInfo.AnalyzeReturn(Outs, RetCC_Hexagon);
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SDValue StackPtr = DAG.getRegister(TM.getRegisterInfo()->getStackRegister(),
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MVT::i32);
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// If this is the first return lowered for this function, add the regs to the
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// liveout set for the function.
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if (DAG.getMachineFunction().getRegInfo().liveout_empty()) {
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@ -320,8 +317,6 @@ HexagonTargetLowering::LowerReturn(SDValue Chain,
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// Copy the result values into the output registers.
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for (unsigned i = 0; i != RVLocs.size(); ++i) {
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CCValAssign &VA = RVLocs[i];
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SDValue Ret = OutVals[i];
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ISD::ArgFlagsTy Flags = Outs[i].Flags;
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Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), OutVals[i], Flag);
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