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https://github.com/c64scene-ar/llvm-6502.git
synced 2025-01-06 20:32:19 +00:00
Use live out sets for return values instead of imp_defs, which is cleaner and faster.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21181 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -160,6 +160,26 @@ X86TargetLowering::LowerArguments(Function &F, SelectionDAG &DAG) {
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if (F.isVarArg())
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VarArgsFrameIndex = MFI->CreateFixedObject(1, ArgOffset);
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ReturnAddrIndex = 0; // No return address slot generated yet.
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// Finally, inform the code generator which regs we return values in.
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switch (getValueType(F.getReturnType())) {
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default: assert(0 && "Unknown type!");
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case MVT::isVoid: break;
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case MVT::i1:
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case MVT::i8:
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case MVT::i16:
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case MVT::i32:
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MF.addLiveOut(X86::EAX);
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break;
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case MVT::i64:
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MF.addLiveOut(X86::EAX);
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MF.addLiveOut(X86::EDX);
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break;
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case MVT::f32:
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case MVT::f64:
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MF.addLiveOut(X86::ST0);
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break;
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}
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return ArgValues;
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}
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@ -2929,9 +2949,6 @@ void ISel::Select(SDOperand N) {
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BuildMI(BB, X86::MOV32rr, 1, X86::EAX).addReg(Tmp1);
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BuildMI(BB, X86::MOV32rr, 1, X86::EDX).addReg(Tmp2);
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// Declare that EAX & EDX are live on exit.
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BuildMI(BB, X86::IMPLICIT_USE, 3).addReg(X86::EAX).addReg(X86::EDX)
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.addReg(X86::ESP);
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break;
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case 2:
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if (getRegPressure(N.getOperand(0)) > getRegPressure(N.getOperand(1))) {
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@ -2945,12 +2962,9 @@ void ISel::Select(SDOperand N) {
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default: assert(0 && "All other types should have been promoted!!");
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case MVT::f64:
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BuildMI(BB, X86::FpSETRESULT, 1).addReg(Tmp1);
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// Declare that top-of-stack is live on exit
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BuildMI(BB, X86::IMPLICIT_USE, 2).addReg(X86::ST0).addReg(X86::ESP);
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break;
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case MVT::i32:
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BuildMI(BB, X86::MOV32rr, 1, X86::EAX).addReg(Tmp1);
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BuildMI(BB, X86::IMPLICIT_USE, 2).addReg(X86::EAX).addReg(X86::ESP);
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break;
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}
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break;
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@ -618,7 +618,8 @@ void X86ISel::LoadArgumentsToVirtualRegs(Function &Fn) {
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unsigned ArgOffset = 0; // Frame mechanisms handle retaddr slot
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MachineFrameInfo *MFI = F->getFrameInfo();
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for (Function::arg_iterator I = Fn.arg_begin(), E = Fn.arg_end(); I != E; ++I) {
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for (Function::arg_iterator I = Fn.arg_begin(), E = Fn.arg_end();
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I != E; ++I) {
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bool ArgLive = !I->use_empty();
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unsigned Reg = ArgLive ? getReg(*I) : 0;
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int FI; // Frame object index
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@ -676,6 +677,25 @@ void X86ISel::LoadArgumentsToVirtualRegs(Function &Fn) {
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// llvm.va_start.
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if (Fn.getFunctionType()->isVarArg())
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VarArgsFrameIndex = MFI->CreateFixedObject(1, ArgOffset);
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// Finally, inform the compiler what our live-outs will be, aka, what we will
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// be returning in registers.
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if (Fn.getReturnType() != Type::VoidTy)
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switch (getClassB(Fn.getReturnType())) {
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default: assert(0 && "Unknown type!");
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case cByte:
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case cShort:
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case cInt:
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F->addLiveOut(X86::EAX);
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break;
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case cLong:
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F->addLiveOut(X86::EAX);
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F->addLiveOut(X86::EDX);
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break;
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case cFP:
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F->addLiveOut(X86::ST0);
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break;
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}
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}
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/// EmitSpecialCodeForMain - Emit any code that needs to be executed only in
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@ -1434,23 +1454,16 @@ void X86ISel::visitReturnInst(ReturnInst &I) {
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case cShort:
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case cInt:
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promote32(X86::EAX, ValueRecord(RetVal));
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// Declare that EAX is live on exit
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BuildMI(BB, X86::IMPLICIT_USE, 2).addReg(X86::EAX).addReg(X86::ESP);
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break;
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case cFP: { // Floats & Doubles: Return in ST(0)
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unsigned RetReg = getReg(RetVal);
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BuildMI(BB, X86::FpSETRESULT, 1).addReg(RetReg);
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// Declare that top-of-stack is live on exit
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BuildMI(BB, X86::IMPLICIT_USE, 2).addReg(X86::ST0).addReg(X86::ESP);
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break;
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}
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case cLong: {
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unsigned RetReg = getReg(RetVal);
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BuildMI(BB, X86::MOV32rr, 1, X86::EAX).addReg(RetReg);
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BuildMI(BB, X86::MOV32rr, 1, X86::EDX).addReg(RetReg+1);
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// Declare that EAX & EDX are live on exit
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BuildMI(BB, X86::IMPLICIT_USE, 3).addReg(X86::EAX).addReg(X86::EDX)
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.addReg(X86::ESP);
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break;
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}
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default:
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