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Remove some dead code: the ORI/ORIS cases are autogen'd. This makes

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SelectIntImmediateExpr dead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23753 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2005-10-15 22:06:18 +00:00
parent de123822e5
commit 4cb5a1b896
1 changed files with 1 additions and 42 deletions
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43
lib/Target/PowerPC/PPCISelDAGToDAG.cpp
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@ -63,10 +63,6 @@ namespace {
// target-specific node if it hasn't already been changed.
SDOperand Select(SDOperand Op);
SDNode *SelectIntImmediateExpr(SDOperand LHS, SDOperand RHS,
unsigned OCHi, unsigned OCLo,
bool IsArithmetic = false,
bool Negate = false);
SDNode *SelectBitfieldInsert(SDNode *N);
/// SelectCC - Select a comparison of the specified values with the
@ -393,38 +389,6 @@ SDNode *PPC32DAGToDAGISel::SelectBitfieldInsert(SDNode *N) {
return 0;
}
// SelectIntImmediateExpr - Choose code for integer operations with an immediate
// operand.
SDNode *PPC32DAGToDAGISel::SelectIntImmediateExpr(SDOperand LHS, SDOperand RHS,
unsigned OCHi, unsigned OCLo,
bool IsArithmetic,
bool Negate) {
// Check to make sure this is a constant.
ConstantSDNode *CN = dyn_cast<ConstantSDNode>(RHS);
// Exit if not a constant.
if (!CN) return 0;
// Extract immediate.
unsigned C = (unsigned)CN->getValue();
// Negate if required (ISD::SUB).
if (Negate) C = -C;
// Get the hi and lo portions of constant.
unsigned Hi = IsArithmetic ? HA16(C) : Hi16(C);
unsigned Lo = Lo16(C);
// If two instructions are needed and usage indicates it would be better to
// load immediate into a register, bail out.
if (Hi && Lo && CN->use_size() > 2) return false;
// Select the first operand.
SDOperand Opr0 = Select(LHS);
if (Lo) // Add in the lo-part.
Opr0 = CurDAG->getTargetNode(OCLo, MVT::i32, Opr0, getI32Imm(Lo));
if (Hi) // Add in the hi-part.
Opr0 = CurDAG->getTargetNode(OCHi, MVT::i32, Opr0, getI32Imm(Hi));
return Opr0.Val;
}
/// SelectAddr - Given the specified address, return the two operands for a
/// load/store instruction, and return true if it should be an indexed [r+r]
/// operation.
@ -1238,11 +1202,6 @@ SDOperand PPC32DAGToDAGISel::Select(SDOperand Op) {
if (SDNode *I = SelectBitfieldInsert(N))
return CodeGenMap[Op] = SDOperand(I, 0);
if (SDNode *I = SelectIntImmediateExpr(N->getOperand(0),
N->getOperand(1),
PPC::ORIS, PPC::ORI))
return CodeGenMap[Op] = SDOperand(I, 0);
// Other cases are autogenerated.
break;
case ISD::SHL: {
@ -1279,7 +1238,7 @@ SDOperand PPC32DAGToDAGISel::Select(SDOperand Op) {
case ISD::FNEG: {
SDOperand Val = Select(N->getOperand(0));
MVT::ValueType Ty = N->getValueType(0);
if (Val.Val->hasOneUse()) {
if (N->getOperand(0).Val->hasOneUse()) {
unsigned Opc;
switch (Val.isTargetOpcode() ? Val.getTargetOpcode() : 0) {
default: Opc = 0; break;