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[mips] Use function TargetInstrInfo::getRegClass.
No functionality changes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183767 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -389,12 +389,14 @@ void MipsSEInstrInfo::expandRetRA(MachineBasicBlock &MBB,
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BuildMI(MBB, I, I->getDebugLoc(), get(Opc)).addReg(Mips::RA);
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}
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std::pair<bool, bool> MipsSEInstrInfo::compareOpndSize(unsigned Opc) const {
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std::pair<bool, bool>
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MipsSEInstrInfo::compareOpndSize(unsigned Opc,
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const MachineFunction &MF) const {
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const MCInstrDesc &Desc = get(Opc);
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assert(Desc.NumOperands == 2 && "Unary instruction expected.");
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const MipsRegisterInfo &RI = getRegisterInfo();
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unsigned DstRegSize = RI.getRegClass(Desc.OpInfo[0].RegClass)->getSize();
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unsigned SrcRegSize = RI.getRegClass(Desc.OpInfo[1].RegClass)->getSize();
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const MipsRegisterInfo *RI = &getRegisterInfo();
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unsigned DstRegSize = getRegClass(Desc, 0, RI, MF)->getSize();
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unsigned SrcRegSize = getRegClass(Desc, 1, RI, MF)->getSize();
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return std::make_pair(DstRegSize > SrcRegSize, DstRegSize < SrcRegSize);
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}
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@ -411,7 +413,7 @@ void MipsSEInstrInfo::expandCvtFPInt(MachineBasicBlock &MBB,
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unsigned SubIdx = (IsI64 ? Mips::sub_32 : Mips::sub_fpeven);
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bool DstIsLarger, SrcIsLarger;
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tie(DstIsLarger, SrcIsLarger) = compareOpndSize(CvtOpc);
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tie(DstIsLarger, SrcIsLarger) = compareOpndSize(CvtOpc, *MBB.getParent());
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if (DstIsLarger)
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TmpReg = getRegisterInfo().getSubReg(DstReg, SubIdx);
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@ -84,7 +84,8 @@ private:
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void expandRetRA(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
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unsigned Opc) const;
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std::pair<bool, bool> compareOpndSize(unsigned Opc) const;
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std::pair<bool, bool> compareOpndSize(unsigned Opc,
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const MachineFunction &MF) const;
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/// Expand pseudo Int-to-FP conversion instructions.
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///
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