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[X86] Apply AddedComplexity consistently for similar patterns. This keeps them together in the DAGISel tables and reduces table size slightly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234086 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1235,7 +1235,8 @@ def : Pat<(store (add (loadi64 addr:$dst), 0x00000000800000000), addr:$dst),
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// This can also reduce instruction size by eliminating the need for the REX
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// prefix.
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let AddedComplexity = 1 in // Give priority over i64immSExt8.
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// AddedComplexity is needed to give priority over i64immSExt8 and i64immSExt32.
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let AddedComplexity = 1 in {
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def : Pat<(and GR64:$src, i64immZExt32SExt8:$imm),
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(SUBREG_TO_REG
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(i64 0),
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@ -1244,7 +1245,6 @@ def : Pat<(and GR64:$src, i64immZExt32SExt8:$imm),
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(i32 (GetLo8XForm imm:$imm))),
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sub_32bit)>;
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let AddedComplexity = 1 in // Give priority over i64immSExt32.
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def : Pat<(and GR64:$src, i64immZExt32:$imm),
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(SUBREG_TO_REG
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(i64 0),
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@ -1252,8 +1252,13 @@ def : Pat<(and GR64:$src, i64immZExt32:$imm),
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(EXTRACT_SUBREG GR64:$src, sub_32bit),
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(i32 (GetLo32XForm imm:$imm))),
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sub_32bit)>;
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} // AddedComplexity = 1
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// AddedComplexity is needed due to the increased complexity on the
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// i64immZExt32SExt8 and i64immZExt32 patterns above. Applying this to all
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// the MOVZX patterns keeps thems together in DAGIsel tables.
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let AddedComplexity = 1 in {
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// r & (2^16-1) ==> movz
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def : Pat<(and GR32:$src1, 0xffff),
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(MOVZX32rr16 (EXTRACT_SUBREG GR32:$src1, sub_16bit))>;
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@ -1271,7 +1276,6 @@ def : Pat<(and GR16:$src1, 0xff),
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Requires<[Not64BitMode]>;
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// r & (2^32-1) ==> movz
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let AddedComplexity = 1 in // Give priority over i64immZExt32.
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def : Pat<(and GR64:$src, 0x00000000FFFFFFFF),
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(SUBREG_TO_REG (i64 0),
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(MOV32rr (EXTRACT_SUBREG GR64:$src, sub_32bit)),
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@ -1283,7 +1287,6 @@ def : Pat<(and GR64:$src, 0xffff),
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(MOVZX32rr16 (i16 (EXTRACT_SUBREG GR64:$src, sub_16bit))),
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sub_32bit)>;
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// r & (2^8-1) ==> movz
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let AddedComplexity = 1 in // Give priority over i64immSExt32.
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def : Pat<(and GR64:$src, 0xff),
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(SUBREG_TO_REG (i64 0),
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(MOVZX32rr8 (i8 (EXTRACT_SUBREG GR64:$src, sub_8bit))),
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@ -1297,6 +1300,7 @@ def : Pat<(and GR16:$src1, 0xff),
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(EXTRACT_SUBREG (MOVZX32rr8 (i8
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(EXTRACT_SUBREG GR16:$src1, sub_8bit))), sub_16bit)>,
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Requires<[In64BitMode]>;
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} // AddedComplexity = 1
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// sext_inreg patterns
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