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https://github.com/c64scene-ar/llvm-6502.git
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[x86] Regenerate and clean up more tests is preparation for vector
shufle switch. I nuked a win64 config from one test as it doesn't really make sense to cover that ABI specially for generic v2f32 tests... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218948 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chandler Carruth
parent
2ce5aac548
commit
4d6f14c9e3
@ -8,508 +8,425 @@
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; illegal shuffle that is expanded into a sub-optimal sequence of instructions
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; during lowering stage.
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define <4 x i32> @swizzle_1(<4 x i32> %v) {
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; CHECK-LABEL: swizzle_1:
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; CHECK: # BB#0:
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,0,3,2]
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; CHECK-NEXT: retq
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%1 = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 3, i32 2, i32 0, i32 1>
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%2 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i32 3, i32 2, i32 0, i32 1>
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ret <4 x i32> %2
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}
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; CHECK-LABEL: swizzle_1
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; Mask: [1,0,3,2]
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; CHECK: pshufd $-79
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; CHECK-NOT: pshufd
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; CHECK-NEXT: ret
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define <4 x i32> @swizzle_2(<4 x i32> %v) {
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; CHECK-LABEL: swizzle_2:
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; CHECK: # BB#0:
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,1,3,0]
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; CHECK-NEXT: retq
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%1 = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 3, i32 1, i32 0, i32 2>
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%2 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i32 3, i32 1, i32 0, i32 2>
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ret <4 x i32> %2
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}
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; CHECK-LABEL: swizzle_2
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; Mask: [2,1,3,0]
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; CHECK: pshufd $54
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; CHECK-NOT: pshufd
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; CHECK-NEXT: ret
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define <4 x i32> @swizzle_3(<4 x i32> %v) {
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; CHECK-LABEL: swizzle_3:
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; CHECK: # BB#0:
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,0,3,2]
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; CHECK-NEXT: retq
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%1 = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 1, i32 0>
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%2 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 1, i32 0>
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ret <4 x i32> %2
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}
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; CHECK-LABEL: swizzle_3
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; Mask: [1,0,3,2]
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; CHECK: pshufd $-79
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; CHECK-NOT: pshufd
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; CHECK-NEXT: ret
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define <4 x i32> @swizzle_4(<4 x i32> %v) {
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; CHECK-LABEL: swizzle_4:
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; CHECK: # BB#0:
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,1,0,2]
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; CHECK-NEXT: retq
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%1 = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 2, i32 1, i32 3, i32 0>
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%2 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i32 2, i32 1, i32 3, i32 0>
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ret <4 x i32> %2
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}
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; CHECK-LABEL: swizzle_4
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; Mask: [3,1,0,2]
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; CHECK: pshufd $-121
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; CHECK-NOT: pshufd
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; CHECK-NEXT: ret
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define <4 x i32> @swizzle_5(<4 x i32> %v) {
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; CHECK-LABEL: swizzle_5:
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; CHECK: # BB#0:
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
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; CHECK-NEXT: retq
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%1 = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 1, i32 2, i32 3, i32 0>
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%2 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i32 1, i32 2, i32 3, i32 0>
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ret <4 x i32> %2
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}
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; CHECK-LABEL: swizzle_5
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; Mask: [2,3,0,1]
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; CHECK: pshufd $78
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; CHECK-NOT: pshufd
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; CHECK-NEXT: ret
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define <4 x i32> @swizzle_6(<4 x i32> %v) {
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; CHECK-LABEL: swizzle_6:
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; CHECK: # BB#0:
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,0,1,3]
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; CHECK-NEXT: retq
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%1 = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 1, i32 2, i32 0, i32 3>
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%2 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i32 1, i32 2, i32 0, i32 3>
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ret <4 x i32> %2
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}
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; CHECK-LABEL: swizzle_6
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; Mask: [2,0,1,3]
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; CHECK: pshufd $-46
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; CHECK-NOT: pshufd
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; CHECK-NEXT: ret
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define <4 x i32> @swizzle_7(<4 x i32> %v) {
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; CHECK-LABEL: swizzle_7:
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; CHECK: # BB#0:
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,3,1]
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; CHECK-NEXT: retq
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%1 = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 0, i32 3, i32 1, i32 2>
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%2 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i32 0, i32 3, i32 1, i32 2>
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ret <4 x i32> %2
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}
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; CHECK-LABEL: swizzle_7
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; Mask: [0,2,3,1]
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; CHECK: pshufd $120
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; CHECK-NOT: pshufd
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; CHECK-NEXT: ret
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define <4 x i32> @swizzle_8(<4 x i32> %v) {
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; CHECK-LABEL: swizzle_8:
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; CHECK: # BB#0:
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,3,2,0]
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; CHECK-NEXT: retq
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%1 = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 3, i32 0, i32 2, i32 1>
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%2 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i32 3, i32 0, i32 2, i32 1>
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ret <4 x i32> %2
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}
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; CHECK-LABEL: swizzle_8
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; Mask: [1,3,2,0]
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; CHECK: pshufd $45
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; CHECK-NOT: pshufd
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; CHECK-NEXT: ret
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define <4 x i32> @swizzle_9(<4 x i32> %v) {
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; CHECK-LABEL: swizzle_9:
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; CHECK: # BB#0:
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
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; CHECK-NEXT: retq
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%1 = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 3, i32 0, i32 1, i32 2>
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%2 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i32 3, i32 0, i32 1, i32 2>
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ret <4 x i32> %2
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}
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; CHECK-LABEL: swizzle_9
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; Mask: [2,3,0,1]
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; CHECK: pshufd $78
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; CHECK-NOT: pshufd
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; CHECK-NEXT: ret
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define <4 x i32> @swizzle_10(<4 x i32> %v) {
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; CHECK-LABEL: swizzle_10:
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; CHECK: # BB#0:
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,2,0,3]
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; CHECK-NEXT: retq
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%1 = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 2, i32 0, i32 1, i32 3>
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%2 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i32 2, i32 0, i32 1, i32 3>
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ret <4 x i32> %2
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}
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; CHECK-LABEL: swizzle_10
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; Mask: [1,2,0,3]
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; CHECK: pshufd $-55
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; CHECK-NOT: pshufd
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; CHECK-NEXT: ret
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define <4 x i32> @swizzle_11(<4 x i32> %v) {
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; CHECK-LABEL: swizzle_11:
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; CHECK: # BB#0:
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,2,1,0]
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; CHECK-NEXT: retq
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%1 = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 2, i32 0, i32 3, i32 1>
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%2 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i32 2, i32 0, i32 3, i32 1>
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ret <4 x i32> %2
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}
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; CHECK-LABEL: swizzle_11
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; Mask: [3,2,1,0]
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; CHECK: pshufd $27
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; CHECK-NOT: pshufd
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; CHECK-NEXT: ret
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define <4 x i32> @swizzle_12(<4 x i32> %v) {
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; CHECK-LABEL: swizzle_12:
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; CHECK: # BB#0:
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,3,1,2]
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; CHECK-NEXT: retq
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%1 = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 0, i32 2, i32 3, i32 1>
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%2 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i32 0, i32 2, i32 3, i32 1>
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ret <4 x i32> %2
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}
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; CHECK-LABEL: swizzle_12
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; Mask: [0,3,1,2]
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; CHECK: pshufd $-100
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; CHECK-NOT: pshufd
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; CHECK-NEXT: ret
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define <4 x i32> @swizzle_13(<4 x i32> %v) {
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; CHECK-LABEL: swizzle_13:
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; CHECK: # BB#0:
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,2,1,0]
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; CHECK-NEXT: retq
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%1 = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 1, i32 3, i32 0, i32 2>
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%2 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i32 1, i32 3, i32 0, i32 2>
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ret <4 x i32> %2
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}
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; CHECK-LABEL: swizzle_13
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; Mask: [3,2,1,0]
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; CHECK: pshufd $27
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; CHECK-NOT: pshufd
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; CHECK-NEXT: ret
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define <4 x i32> @swizzle_14(<4 x i32> %v) {
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; CHECK-LABEL: swizzle_14:
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; CHECK: # BB#0:
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,0,2,1]
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; CHECK-NEXT: retq
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%1 = shufflevector <4 x i32> %v, <4 x i32> undef, <4 x i32> <i32 1, i32 3, i32 2, i32 0>
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%2 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i32 1, i32 3, i32 2, i32 0>
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ret <4 x i32> %2
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}
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; CHECK-LABEL: swizzle_14
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; Mask: [3,0,2,1]
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; CHECK: pshufd $99
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; CHECK-NOT: pshufd
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; CHECK-NEXT: ret
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define <4 x float> @swizzle_15(<4 x float> %v) {
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; CHECK-LABEL: swizzle_15:
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; CHECK: # BB#0:
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,0,3,2]
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; CHECK-NEXT: retq
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%1 = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 3, i32 2, i32 0, i32 1>
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%2 = shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> <i32 3, i32 2, i32 0, i32 1>
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ret <4 x float> %2
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}
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; CHECK-LABEL: swizzle_15
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; Mask: [1,0,3,2]
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; CHECK: pshufd $-79
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; CHECK-NOT: pshufd
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; CHECK-NEXT: ret
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define <4 x float> @swizzle_16(<4 x float> %v) {
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; CHECK-LABEL: swizzle_16:
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; CHECK: # BB#0:
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,1,3,0]
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; CHECK-NEXT: retq
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%1 = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 3, i32 1, i32 0, i32 2>
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%2 = shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> <i32 3, i32 1, i32 0, i32 2>
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ret <4 x float> %2
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}
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; CHECK-LABEL: swizzle_16
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; Mask: [2,1,3,0]
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; CHECK: pshufd $54
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; CHECK-NOT: pshufd
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; CHECK-NEXT: ret
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define <4 x float> @swizzle_17(<4 x float> %v) {
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; CHECK-LABEL: swizzle_17:
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; CHECK: # BB#0:
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,0,3,2]
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; CHECK-NEXT: retq
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%1 = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 2, i32 3, i32 1, i32 0>
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%2 = shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> <i32 2, i32 3, i32 1, i32 0>
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ret <4 x float> %2
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}
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; CHECK-LABEL: swizzle_17
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; Mask: [1,0,3,2]
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; CHECK: pshufd $-79
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; CHECK-NOT: pshufd
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; CHECK-NEXT: ret
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define <4 x float> @swizzle_18(<4 x float> %v) {
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; CHECK-LABEL: swizzle_18:
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; CHECK: # BB#0:
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,1,0,2]
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; CHECK-NEXT: retq
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%1 = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 2, i32 1, i32 3, i32 0>
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%2 = shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> <i32 2, i32 1, i32 3, i32 0>
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ret <4 x float> %2
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}
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; CHECK-LABEL: swizzle_18
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; Mask: [3,1,0,2]
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; CHECK: pshufd $-121
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; CHECK-NOT: pshufd
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; CHECK-NEXT: ret
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define <4 x float> @swizzle_19(<4 x float> %v) {
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; CHECK-LABEL: swizzle_19:
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; CHECK: # BB#0:
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
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; CHECK-NEXT: retq
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%1 = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 1, i32 2, i32 3, i32 0>
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%2 = shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> <i32 1, i32 2, i32 3, i32 0>
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ret <4 x float> %2
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}
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; CHECK-LABEL: swizzle_19
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; Mask: [2,3,0,1]
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; CHECK: pshufd $78
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; CHECK-NOT: pshufd
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; CHECK-NEXT: ret
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define <4 x float> @swizzle_20(<4 x float> %v) {
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; CHECK-LABEL: swizzle_20:
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; CHECK: # BB#0:
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,0,1,3]
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; CHECK-NEXT: retq
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%1 = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 1, i32 2, i32 0, i32 3>
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%2 = shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> <i32 1, i32 2, i32 0, i32 3>
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ret <4 x float> %2
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}
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; CHECK-LABEL: swizzle_20
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; Mask: [2,0,1,3]
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; CHECK: pshufd $-46
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; CHECK-NOT: pshufd
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; CHECK-NEXT: ret
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define <4 x float> @swizzle_21(<4 x float> %v) {
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; CHECK-LABEL: swizzle_21:
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; CHECK: # BB#0:
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,3,1]
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; CHECK-NEXT: retq
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%1 = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 0, i32 3, i32 1, i32 2>
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%2 = shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> <i32 0, i32 3, i32 1, i32 2>
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ret <4 x float> %2
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}
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; CHECK-LABEL: swizzle_21
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; Mask: [0,2,3,1]
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; CHECK: pshufd $120
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; CHECK-NOT: pshufd
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; CHECK-NEXT: ret
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define <4 x float> @swizzle_22(<4 x float> %v) {
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; CHECK-LABEL: swizzle_22:
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; CHECK: # BB#0:
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,3,2,0]
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; CHECK-NEXT: retq
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%1 = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 3, i32 0, i32 2, i32 1>
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%2 = shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> <i32 3, i32 0, i32 2, i32 1>
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ret <4 x float> %2
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}
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; CHECK-LABEL: swizzle_22
|
||||
; Mask: [1,3,2,0]
|
||||
; CHECK: pshufd $45
|
||||
; CHECK-NOT: pshufd
|
||||
; CHECK-NEXT: ret
|
||||
|
||||
|
||||
define <4 x float> @swizzle_23(<4 x float> %v) {
|
||||
; CHECK-LABEL: swizzle_23:
|
||||
; CHECK: # BB#0:
|
||||
; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
|
||||
; CHECK-NEXT: retq
|
||||
%1 = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 3, i32 0, i32 1, i32 2>
|
||||
%2 = shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> <i32 3, i32 0, i32 1, i32 2>
|
||||
ret <4 x float> %2
|
||||
}
|
||||
; CHECK-LABEL: swizzle_23
|
||||
; Mask: [2,3,0,1]
|
||||
; CHECK: pshufd $78
|
||||
; CHECK-NOT: pshufd
|
||||
; CHECK-NEXT: ret
|
||||
|
||||
|
||||
define <4 x float> @swizzle_24(<4 x float> %v) {
|
||||
; CHECK-LABEL: swizzle_24:
|
||||
; CHECK: # BB#0:
|
||||
; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,2,0,3]
|
||||
; CHECK-NEXT: retq
|
||||
%1 = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 2, i32 0, i32 1, i32 3>
|
||||
%2 = shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> <i32 2, i32 0, i32 1, i32 3>
|
||||
ret <4 x float> %2
|
||||
}
|
||||
; CHECK-LABEL: swizzle_24
|
||||
; Mask: [1,2,0,3]
|
||||
; CHECK: pshufd $-55
|
||||
; CHECK-NOT: pshufd
|
||||
; CHECK-NEXT: ret
|
||||
|
||||
|
||||
define <4 x float> @swizzle_25(<4 x float> %v) {
|
||||
; CHECK-LABEL: swizzle_25:
|
||||
; CHECK: # BB#0:
|
||||
; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,2,1,0]
|
||||
; CHECK-NEXT: retq
|
||||
%1 = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 2, i32 0, i32 3, i32 1>
|
||||
%2 = shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> <i32 2, i32 0, i32 3, i32 1>
|
||||
ret <4 x float> %2
|
||||
}
|
||||
; CHECK-LABEL: swizzle_25
|
||||
; Mask: [3,2,1,0]
|
||||
; CHECK: pshufd $27
|
||||
; CHECK-NOT: pshufd
|
||||
; CHECK-NEXT: ret
|
||||
|
||||
|
||||
define <4 x float> @swizzle_26(<4 x float> %v) {
|
||||
; CHECK-LABEL: swizzle_26:
|
||||
; CHECK: # BB#0:
|
||||
; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,3,1,2]
|
||||
; CHECK-NEXT: retq
|
||||
%1 = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 0, i32 2, i32 3, i32 1>
|
||||
%2 = shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> <i32 0, i32 2, i32 3, i32 1>
|
||||
ret <4 x float> %2
|
||||
}
|
||||
; CHECK-LABEL: swizzle_26
|
||||
; Mask: [0,3,1,2]
|
||||
; CHECK: pshufd $-100
|
||||
; CHECK-NOT: pshufd
|
||||
; CHECK-NEXT: ret
|
||||
|
||||
|
||||
define <4 x float> @swizzle_27(<4 x float> %v) {
|
||||
; CHECK-LABEL: swizzle_27:
|
||||
; CHECK: # BB#0:
|
||||
; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,2,1,0]
|
||||
; CHECK-NEXT: retq
|
||||
%1 = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 1, i32 3, i32 0, i32 2>
|
||||
%2 = shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> <i32 1, i32 3, i32 0, i32 2>
|
||||
ret <4 x float> %2
|
||||
}
|
||||
; CHECK-LABEL: swizzle_27
|
||||
; Mask: [3,2,1,0]
|
||||
; CHECK: pshufd $27
|
||||
; CHECK-NOT: pshufd
|
||||
; CHECK-NEXT: ret
|
||||
|
||||
|
||||
define <4 x float> @swizzle_28(<4 x float> %v) {
|
||||
; CHECK-LABEL: swizzle_28:
|
||||
; CHECK: # BB#0:
|
||||
; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,0,2,1]
|
||||
; CHECK-NEXT: retq
|
||||
%1 = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 1, i32 3, i32 2, i32 0>
|
||||
%2 = shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> <i32 1, i32 3, i32 2, i32 0>
|
||||
ret <4 x float> %2
|
||||
}
|
||||
; CHECK-LABEL: swizzle_28
|
||||
; Mask: [3,0,2,1]
|
||||
; CHECK: pshufd $99
|
||||
; CHECK-NOT: pshufd
|
||||
; CHECK-NEXT: ret
|
||||
|
||||
|
||||
define <4 x float> @swizzle_29(<4 x float> %v) {
|
||||
; CHECK-LABEL: swizzle_29:
|
||||
; CHECK: # BB#0:
|
||||
; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,3,2,0]
|
||||
; CHECK-NEXT: retq
|
||||
%1 = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 3, i32 1, i32 2, i32 0>
|
||||
%2 = shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> <i32 1, i32 0, i32 2, i32 3>
|
||||
ret <4 x float> %2
|
||||
}
|
||||
; CHECK-LABEL: swizzle_29
|
||||
; Mask: [1,3,2,0]
|
||||
; CHECK: pshufd $45
|
||||
; CHECK-NOT: pshufd
|
||||
; CHECK-NEXT: ret
|
||||
|
||||
; Make sure that we combine the shuffles from each function below into a single
|
||||
; legal shuffle (either pshuflw or pshufb depending on the masks).
|
||||
|
||||
define <8 x i16> @swizzle_30(<8 x i16> %v) {
|
||||
; CHECK-LABEL: swizzle_30:
|
||||
; CHECK: # BB#0:
|
||||
; CHECK-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[1,3,2,0,4,5,6,7]
|
||||
; CHECK-NEXT: retq
|
||||
%1 = shufflevector <8 x i16> %v, <8 x i16> undef, <8 x i32> <i32 3, i32 1, i32 2, i32 0, i32 7, i32 5, i32 6, i32 4>
|
||||
%2 = shufflevector <8 x i16> %1, <8 x i16> undef, <8 x i32> <i32 1, i32 0, i32 2, i32 3, i32 7, i32 5, i32 6, i32 4>
|
||||
ret <8 x i16> %2
|
||||
}
|
||||
; CHECK-LABEL: swizzle_30
|
||||
; Mask: [1,3,2,0,5,7,6,4]
|
||||
; CHECK: pshuflw $45
|
||||
; CHECK-NOT: pshufb
|
||||
; CHECK-NEXT: ret
|
||||
|
||||
|
||||
define <8 x i16> @swizzle_31(<8 x i16> %v) {
|
||||
; CHECK-LABEL: swizzle_31:
|
||||
; CHECK: # BB#0:
|
||||
; CHECK-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[1,3,2,0,4,5,6,7]
|
||||
; CHECK-NEXT: retq
|
||||
%1 = shufflevector <8 x i16> %v, <8 x i16> undef, <8 x i32> <i32 3, i32 0, i32 2, i32 1, i32 7, i32 5, i32 6, i32 4>
|
||||
%2 = shufflevector <8 x i16> %1, <8 x i16> undef, <8 x i32> <i32 3, i32 0, i32 2, i32 1, i32 7, i32 5, i32 6, i32 4>
|
||||
ret <8 x i16> %2
|
||||
}
|
||||
; CHECK-LABEL: swizzle_31
|
||||
; Mask: [1,3,2,0,4,5,6,7]
|
||||
; CHECK: pshuflw $45
|
||||
; CHECK-NOT: pshufb
|
||||
; CHECK: ret
|
||||
|
||||
|
||||
define <8 x i16> @swizzle_32(<8 x i16> %v) {
|
||||
; CHECK-LABEL: swizzle_32:
|
||||
; CHECK: # BB#0:
|
||||
; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,0,2,3]
|
||||
; CHECK-NEXT: retq
|
||||
%1 = shufflevector <8 x i16> %v, <8 x i16> undef, <8 x i32> <i32 1, i32 2, i32 3, i32 0, i32 7, i32 5, i32 6, i32 4>
|
||||
%2 = shufflevector <8 x i16> %1, <8 x i16> undef, <8 x i32> <i32 1, i32 2, i32 3, i32 0, i32 7, i32 5, i32 6, i32 4>
|
||||
ret <8 x i16> %2
|
||||
}
|
||||
; CHECK-LABEL: swizzle_32
|
||||
; Mask: [2,3,0,1,4,5,6,7] --> equivalent to pshufd mask [1,0,2,3]
|
||||
; CHECK: pshufd $-31
|
||||
; CHECK-NOT: pshufb
|
||||
; CHECK: ret
|
||||
|
||||
define <8 x i16> @swizzle_33(<8 x i16> %v) {
|
||||
; CHECK-LABEL: swizzle_33:
|
||||
; CHECK: # BB#0:
|
||||
; CHECK-NEXT: pshufb {{.*#+}} xmm0 = xmm0[4,5,2,3,6,7,0,1,10,11,14,15,12,13,8,9]
|
||||
; CHECK-NEXT: retq
|
||||
%1 = shufflevector <8 x i16> %v, <8 x i16> undef, <8 x i32> <i32 4, i32 6, i32 5, i32 7, i32 2, i32 3, i32 1, i32 0>
|
||||
%2 = shufflevector <8 x i16> %1, <8 x i16> undef, <8 x i32> <i32 4, i32 6, i32 5, i32 7, i32 2, i32 3, i32 1, i32 0>
|
||||
ret <8 x i16> %2
|
||||
}
|
||||
; CHECK-LABEL: swizzle_33
|
||||
; CHECK: pshufb
|
||||
; CHECK-NOT: pshufb
|
||||
; CHECK-NOT: shufpd
|
||||
; CHECK: ret
|
||||
|
||||
|
||||
define <8 x i16> @swizzle_34(<8 x i16> %v) {
|
||||
; CHECK-LABEL: swizzle_34:
|
||||
; CHECK: # BB#0:
|
||||
; CHECK-NEXT: pshufb {{.*#+}} xmm0 = xmm0[2,3,6,7,0,1,4,5,14,15,12,13,8,9,10,11]
|
||||
; CHECK-NEXT: retq
|
||||
%1 = shufflevector <8 x i16> %v, <8 x i16> undef, <8 x i32> <i32 4, i32 7, i32 6, i32 5, i32 1, i32 2, i32 0, i32 3>
|
||||
%2 = shufflevector <8 x i16> %1, <8 x i16> undef, <8 x i32> <i32 4, i32 7, i32 6, i32 5, i32 1, i32 2, i32 0, i32 3>
|
||||
ret <8 x i16> %2
|
||||
}
|
||||
; CHECK-LABEL: swizzle_34
|
||||
; CHECK: pshufb
|
||||
; CHECK-NOT: pshufb
|
||||
; CHECK-NOT: shufpd
|
||||
; CHECK: ret
|
||||
|
||||
|
||||
define <8 x i16> @swizzle_35(<8 x i16> %v) {
|
||||
; CHECK-LABEL: swizzle_35:
|
||||
; CHECK: # BB#0:
|
||||
; CHECK-NEXT: pshufb {{.*#+}} xmm0 = xmm0[4,5,2,3,0,1,6,7,8,9,10,11,14,15,12,13]
|
||||
; CHECK-NEXT: retq
|
||||
%1 = shufflevector <8 x i16> %v, <8 x i16> undef, <8 x i32> <i32 7, i32 4, i32 6, i32 5, i32 1, i32 3, i32 0, i32 2>
|
||||
%2 = shufflevector <8 x i16> %1, <8 x i16> undef, <8 x i32> <i32 7, i32 4, i32 6, i32 5, i32 1, i32 3, i32 0, i32 2>
|
||||
ret <8 x i16> %2
|
||||
}
|
||||
; CHECK-LABEL: swizzle_35
|
||||
; CHECK: pshufb
|
||||
; CHECK-NOT: pshufb
|
||||
; CHECK: ret
|
||||
|
||||
|
||||
define <8 x i16> @swizzle_36(<8 x i16> %v) {
|
||||
; CHECK-LABEL: swizzle_36:
|
||||
; CHECK: # BB#0:
|
||||
; CHECK-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,1,6,7,4,5,2,3,8,9,12,13,10,11,14,15]
|
||||
; CHECK-NEXT: retq
|
||||
%1 = shufflevector <8 x i16> %v, <8 x i16> undef, <8 x i32> <i32 4, i32 6, i32 7, i32 5, i32 0, i32 1, i32 3, i32 2>
|
||||
%2 = shufflevector <8 x i16> %1, <8 x i16> undef, <8 x i32> <i32 4, i32 6, i32 7, i32 5, i32 0, i32 1, i32 3, i32 2>
|
||||
ret <8 x i16> %2
|
||||
}
|
||||
; CHECK-LABEL: swizzle_36
|
||||
; CHECK: pshufb
|
||||
; CHECK-NOT: pshufb
|
||||
; CHECK-NOT: shufpd
|
||||
; CHECK: ret
|
||||
|
||||
|
||||
define <8 x i16> @swizzle_37(<8 x i16> %v) {
|
||||
; CHECK-LABEL: swizzle_37:
|
||||
; CHECK: # BB#0:
|
||||
; CHECK-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,7,6,5]
|
||||
; CHECK-NEXT: retq
|
||||
%1 = shufflevector <8 x i16> %v, <8 x i16> undef, <8 x i32> <i32 1, i32 0, i32 3, i32 2, i32 7, i32 5, i32 6, i32 4>
|
||||
%2 = shufflevector <8 x i16> %1, <8 x i16> undef, <8 x i32> <i32 1, i32 0, i32 3, i32 2, i32 7, i32 4, i32 6, i32 5>
|
||||
ret <8 x i16> %2
|
||||
}
|
||||
; CHECK-LABEL: swizzle_37
|
||||
; Mask: [0,1,2,3,4,7,6,5]
|
||||
; CHECK: pshufhw $108
|
||||
; CHECK-NOT: pshufb
|
||||
; CHECK: ret
|
||||
|
||||
|
||||
define <8 x i16> @swizzle_38(<8 x i16> %v) {
|
||||
; CHECK-LABEL: swizzle_38:
|
||||
; CHECK: # BB#0:
|
||||
; CHECK-NEXT: pshufb {{.*#+}} xmm0 = xmm0[4,5,2,3,0,1,6,7,10,11,8,9,12,13,14,15]
|
||||
; CHECK-NEXT: retq
|
||||
%1 = shufflevector <8 x i16> %v, <8 x i16> undef, <8 x i32> <i32 5, i32 6, i32 4, i32 7, i32 0, i32 2, i32 1, i32 3>
|
||||
%2 = shufflevector <8 x i16> %1, <8 x i16> undef, <8 x i32> <i32 5, i32 6, i32 4, i32 7, i32 0, i32 2, i32 1, i32 3>
|
||||
ret <8 x i16> %2
|
||||
}
|
||||
; CHECK-LABEL: swizzle_38
|
||||
; CHECK: pshufb
|
||||
; CHECK-NOT: pshufb
|
||||
; CHECK-NOT: shufpd
|
||||
; CHECK: ret
|
||||
|
||||
|
||||
define <8 x i16> @swizzle_39(<8 x i16> %v) {
|
||||
; CHECK-LABEL: swizzle_39:
|
||||
; CHECK: # BB#0:
|
||||
; CHECK-NEXT: pshufb {{.*#+}} xmm0 = xmm0[4,5,6,7,2,3,0,1,14,15,12,13,8,9,10,11]
|
||||
; CHECK-NEXT: retq
|
||||
%1 = shufflevector <8 x i16> %v, <8 x i16> undef, <8 x i32> <i32 5, i32 4, i32 6, i32 7, i32 3, i32 2, i32 1, i32 0>
|
||||
%2 = shufflevector <8 x i16> %1, <8 x i16> undef, <8 x i32> <i32 5, i32 4, i32 6, i32 7, i32 3, i32 2, i32 1, i32 0>
|
||||
ret <8 x i16> %2
|
||||
}
|
||||
; CHECK-LABEL: swizzle_39
|
||||
; CHECK: pshufb
|
||||
; CHECK-NOT: pshufb
|
||||
; CHECK-NOT: shufpd
|
||||
; CHECK: ret
|
||||
|
||||
|
||||
define <8 x i16> @swizzle_40(<8 x i16> %v) {
|
||||
; CHECK-LABEL: swizzle_40:
|
||||
; CHECK: # BB#0:
|
||||
; CHECK-NEXT: pshufb {{.*#+}} xmm0 = xmm0[6,7,2,3,4,5,0,1,8,9,12,13,10,11,14,15]
|
||||
; CHECK-NEXT: retq
|
||||
%1 = shufflevector <8 x i16> %v, <8 x i16> undef, <8 x i32> <i32 6, i32 4, i32 7, i32 5, i32 1, i32 0, i32 3, i32 2>
|
||||
%2 = shufflevector <8 x i16> %1, <8 x i16> undef, <8 x i32> <i32 6, i32 4, i32 7, i32 5, i32 1, i32 0, i32 3, i32 2>
|
||||
ret <8 x i16> %2
|
||||
}
|
||||
; CHECK-LABEL: swizzle_40
|
||||
; CHECK: pshufb
|
||||
; CHECK-NOT: pshufb
|
||||
; CHECK-NOT: shufpd
|
||||
; CHECK: ret
|
||||
|
||||
|
||||
define <8 x i16> @swizzle_41(<8 x i16> %v) {
|
||||
; CHECK-LABEL: swizzle_41:
|
||||
; CHECK: # BB#0:
|
||||
; CHECK-NEXT: pshufb {{.*#+}} xmm0 = xmm0[6,7,4,5,2,3,0,1,12,13,14,15,8,9,10,11]
|
||||
; CHECK-NEXT: retq
|
||||
%1 = shufflevector <8 x i16> %v, <8 x i16> undef, <8 x i32> <i32 6, i32 7, i32 5, i32 4, i32 0, i32 1, i32 3, i32 2>
|
||||
%2 = shufflevector <8 x i16> %1, <8 x i16> undef, <8 x i32> <i32 6, i32 7, i32 5, i32 4, i32 0, i32 1, i32 3, i32 2>
|
||||
ret <8 x i16> %2
|
||||
}
|
||||
; CHECK-LABEL: swizzle_41
|
||||
; CHECK: pshufb
|
||||
; CHECK-NOT: pshufb
|
||||
; CHECK-NOT: shufpd
|
||||
; CHECK: ret
|
||||
|
||||
|
||||
define <8 x i16> @swizzle_42(<8 x i16> %v) {
|
||||
; CHECK-LABEL: swizzle_42:
|
||||
; CHECK: # BB#0:
|
||||
; CHECK-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,5,4,7,6]
|
||||
; CHECK-NEXT: retq
|
||||
%1 = shufflevector <8 x i16> %v, <8 x i16> undef, <8 x i32> <i32 0, i32 1, i32 3, i32 2, i32 7, i32 6, i32 4, i32 5>
|
||||
%2 = shufflevector <8 x i16> %1, <8 x i16> undef, <8 x i32> <i32 0, i32 1, i32 3, i32 2, i32 7, i32 6, i32 4, i32 5>
|
||||
ret <8 x i16> %2
|
||||
}
|
||||
; CHECK-LABEL: swizzle_42
|
||||
; Mask: [0,1,2,3,5,4,7,6]
|
||||
; CHECK: pshufhw $-79
|
||||
; CHECK-NOT: pshufb
|
||||
; CHECK: ret
|
||||
|
||||
|
||||
|
||||
@ -2,14 +2,19 @@
|
||||
|
||||
; rdar://6504833
|
||||
define float @test1(i32 %x) nounwind readnone {
|
||||
; CHECK: test1
|
||||
; CHECK: movd
|
||||
; CHECK: orps
|
||||
; CHECK: subsd
|
||||
; CHECK: cvtsd2ss
|
||||
; CHECK: movss
|
||||
; CHECK: flds
|
||||
; CHECK: ret
|
||||
; CHECK-LABEL: test1:
|
||||
; CHECK: # BB#0: # %entry
|
||||
; CHECK-NEXT: pushl %eax
|
||||
; CHECK-NEXT: movsd {{.*}}, %xmm0
|
||||
; CHECK-NEXT: movd {{[0-9]+}}(%esp), %xmm1
|
||||
; CHECK-NEXT: orps %xmm0, %xmm1
|
||||
; CHECK-NEXT: subsd %xmm0, %xmm1
|
||||
; CHECK-NEXT: xorps %xmm0, %xmm0
|
||||
; CHECK-NEXT: cvtsd2ss %xmm1, %xmm0
|
||||
; CHECK-NEXT: movss %xmm0, (%esp)
|
||||
; CHECK-NEXT: flds (%esp)
|
||||
; CHECK-NEXT: popl %eax
|
||||
; CHECK-NEXT: retl
|
||||
entry:
|
||||
%0 = uitofp i32 %x to float
|
||||
ret float %0
|
||||
@ -17,15 +22,20 @@ entry:
|
||||
|
||||
; PR10802
|
||||
define float @test2(<4 x i32> %x) nounwind readnone ssp {
|
||||
; CHECK: test2
|
||||
; CHECK: xorps [[ZERO:%xmm[0-9]+]]
|
||||
; CHECK: movss {{.*}}, [[ZERO]]
|
||||
; CHECK: orps
|
||||
; CHECK: subsd
|
||||
; CHECK: cvtsd2ss
|
||||
; CHECK: movss
|
||||
; CHECK: flds
|
||||
; CHECK: ret
|
||||
; CHECK-LABEL: test2:
|
||||
; CHECK: # BB#0: # %entry
|
||||
; CHECK-NEXT: pushl %eax
|
||||
; CHECK-NEXT: xorps %xmm1, %xmm1
|
||||
; CHECK-NEXT: movss %xmm0, %xmm1
|
||||
; CHECK-NEXT: movsd {{.*}}, %xmm0
|
||||
; CHECK-NEXT: orps %xmm0, %xmm1
|
||||
; CHECK-NEXT: subsd %xmm0, %xmm1
|
||||
; CHECK-NEXT: xorps %xmm0, %xmm0
|
||||
; CHECK-NEXT: cvtsd2ss %xmm1, %xmm0
|
||||
; CHECK-NEXT: movss %xmm0, (%esp)
|
||||
; CHECK-NEXT: flds (%esp)
|
||||
; CHECK-NEXT: popl %eax
|
||||
; CHECK-NEXT: retl
|
||||
entry:
|
||||
%vecext = extractelement <4 x i32> %x, i32 0
|
||||
%conv = uitofp i32 %vecext to float
|
||||
|
||||
@ -1,115 +1,92 @@
|
||||
; RUN: llc < %s -mtriple=x86_64-linux -mcpu=penryn -asm-verbose=0 -o - | FileCheck %s -check-prefix=X64
|
||||
; RUN: llc < %s -mtriple=x86_64-win32 -mcpu=penryn -asm-verbose=0 -o - | FileCheck %s -check-prefix=W64
|
||||
; RUN: llc < %s -mcpu=yonah -march=x86 -mtriple=i386-linux-gnu -asm-verbose=0 -o - | FileCheck %s -check-prefix=X32
|
||||
; RUN: llc < %s -mtriple=x86_64-linux -mcpu=penryn -o - | FileCheck %s --check-prefix=X64
|
||||
; RUN: llc < %s -mcpu=yonah -march=x86 -mtriple=i386-linux-gnu -o - | FileCheck %s --check-prefix=X32
|
||||
|
||||
; PR7518
|
||||
define void @test1(<2 x float> %Q, float *%P2) nounwind {
|
||||
; X64-LABEL: test1:
|
||||
; X64: # BB#0:
|
||||
; X64-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,0,0,0]
|
||||
; X64-NEXT: addss %xmm0, %xmm1
|
||||
; X64-NEXT: movss %xmm1, (%rdi)
|
||||
; X64-NEXT: retq
|
||||
;
|
||||
; X32-LABEL: test1:
|
||||
; X32: # BB#0:
|
||||
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
|
||||
; X32-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,0,0,0]
|
||||
; X32-NEXT: addss %xmm0, %xmm1
|
||||
; X32-NEXT: movss %xmm1, (%eax)
|
||||
; X32-NEXT: retl
|
||||
%a = extractelement <2 x float> %Q, i32 0
|
||||
%b = extractelement <2 x float> %Q, i32 1
|
||||
%c = fadd float %a, %b
|
||||
|
||||
store float %c, float* %P2
|
||||
ret void
|
||||
; X64-LABEL: test1:
|
||||
; X64-NEXT: pshufd $1, %xmm0, %xmm1
|
||||
; X64-NEXT: addss %xmm0, %xmm1
|
||||
; X64-NEXT: movss %xmm1, (%rdi)
|
||||
; X64-NEXT: ret
|
||||
|
||||
; W64-LABEL: test1:
|
||||
; W64-NEXT: movdqa (%rcx), %xmm0
|
||||
; W64-NEXT: pshufd $1, %xmm0, %xmm1
|
||||
; W64-NEXT: addss %xmm0, %xmm1
|
||||
; W64-NEXT: movss %xmm1, (%rdx)
|
||||
; W64-NEXT: ret
|
||||
|
||||
; X32-LABEL: test1:
|
||||
; X32-NEXT: movl 4(%esp), %eax
|
||||
; X32-NEXT: pshufd $1, %xmm0, %xmm1
|
||||
; X32-NEXT: addss %xmm0, %xmm1
|
||||
; X32-NEXT: movss %xmm1, (%eax)
|
||||
; X32-NEXT: ret
|
||||
}
|
||||
|
||||
|
||||
define <2 x float> @test2(<2 x float> %Q, <2 x float> %R, <2 x float> *%P) nounwind {
|
||||
; X64-LABEL: test2:
|
||||
; X64: # BB#0:
|
||||
; X64-NEXT: addps %xmm1, %xmm0
|
||||
; X64-NEXT: retq
|
||||
;
|
||||
; X32-LABEL: test2:
|
||||
; X32: # BB#0:
|
||||
; X32-NEXT: addps %xmm1, %xmm0
|
||||
; X32-NEXT: retl
|
||||
%Z = fadd <2 x float> %Q, %R
|
||||
ret <2 x float> %Z
|
||||
|
||||
; X64-LABEL: test2:
|
||||
; X64-NEXT: addps %xmm1, %xmm0
|
||||
; X64-NEXT: ret
|
||||
|
||||
; W64-LABEL: test2:
|
||||
; W64-NEXT: movaps (%rcx), %xmm0
|
||||
; W64-NEXT: addps (%rdx), %xmm0
|
||||
; W64-NEXT: ret
|
||||
|
||||
; X32-LABEL: test2:
|
||||
; X32: addps %xmm1, %xmm0
|
||||
}
|
||||
|
||||
|
||||
define <2 x float> @test3(<4 x float> %A) nounwind {
|
||||
; X64-LABEL: test3:
|
||||
; X64: # BB#0:
|
||||
; X64-NEXT: addps %xmm0, %xmm0
|
||||
; X64-NEXT: retq
|
||||
;
|
||||
; X32-LABEL: test3:
|
||||
; X32: # BB#0:
|
||||
; X32-NEXT: addps %xmm0, %xmm0
|
||||
; X32-NEXT: retl
|
||||
%B = shufflevector <4 x float> %A, <4 x float> undef, <2 x i32> <i32 0, i32 1>
|
||||
%C = fadd <2 x float> %B, %B
|
||||
ret <2 x float> %C
|
||||
; X64-LABEL: test3:
|
||||
; X64-NEXT: addps %xmm0, %xmm0
|
||||
; X64-NEXT: ret
|
||||
|
||||
; W64-LABEL: test3:
|
||||
; W64-NEXT: movaps (%rcx), %xmm0
|
||||
; W64-NEXT: addps %xmm0, %xmm0
|
||||
; W64-NEXT: ret
|
||||
|
||||
; X32-LABEL: test3:
|
||||
; X32-NEXT: addps %xmm0, %xmm0
|
||||
; X32-NEXT: ret
|
||||
}
|
||||
|
||||
define <2 x float> @test4(<2 x float> %A) nounwind {
|
||||
; X64-LABEL: test4:
|
||||
; X64: # BB#0:
|
||||
; X64-NEXT: addps %xmm0, %xmm0
|
||||
; X64-NEXT: retq
|
||||
;
|
||||
; X32-LABEL: test4:
|
||||
; X32: # BB#0:
|
||||
; X32-NEXT: addps %xmm0, %xmm0
|
||||
; X32-NEXT: retl
|
||||
%C = fadd <2 x float> %A, %A
|
||||
ret <2 x float> %C
|
||||
; X64-LABEL: test4:
|
||||
; X64-NEXT: addps %xmm0, %xmm0
|
||||
; X64-NEXT: ret
|
||||
|
||||
; W64-LABEL: test4:
|
||||
; W64-NEXT: movaps (%rcx), %xmm0
|
||||
; W64-NEXT: addps %xmm0, %xmm0
|
||||
; W64-NEXT: ret
|
||||
|
||||
; X32-LABEL: test4:
|
||||
; X32-NEXT: addps %xmm0, %xmm0
|
||||
; X32-NEXT: ret
|
||||
}
|
||||
|
||||
define <4 x float> @test5(<4 x float> %A) nounwind {
|
||||
; X64-LABEL: test5:
|
||||
; X64: # BB#0:
|
||||
; X64-NEXT: addps %xmm0, %xmm0
|
||||
; X64-NEXT: addps %xmm0, %xmm0
|
||||
; X64-NEXT: retq
|
||||
;
|
||||
; X32-LABEL: test5:
|
||||
; X32: # BB#0:
|
||||
; X32-NEXT: addps %xmm0, %xmm0
|
||||
; X32-NEXT: addps %xmm0, %xmm0
|
||||
; X32-NEXT: retl
|
||||
%B = shufflevector <4 x float> %A, <4 x float> undef, <2 x i32> <i32 0, i32 1>
|
||||
%C = fadd <2 x float> %B, %B
|
||||
br label %BB
|
||||
|
||||
br label %BB
|
||||
|
||||
BB:
|
||||
%D = fadd <2 x float> %C, %C
|
||||
%D = fadd <2 x float> %C, %C
|
||||
%E = shufflevector <2 x float> %D, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
|
||||
ret <4 x float> %E
|
||||
|
||||
; X64-LABEL: test5:
|
||||
; X64-NEXT: addps %xmm0, %xmm0
|
||||
; X64-NEXT: addps %xmm0, %xmm0
|
||||
; X64-NEXT: ret
|
||||
|
||||
; W64-LABEL: test5:
|
||||
; W64-NEXT: movaps (%rcx), %xmm0
|
||||
; W64-NEXT: addps %xmm0, %xmm0
|
||||
; W64-NEXT: addps %xmm0, %xmm0
|
||||
; W64-NEXT: ret
|
||||
|
||||
; X32-LABEL: test5:
|
||||
; X32-NEXT: addps %xmm0, %xmm0
|
||||
; X32-NEXT: addps %xmm0, %xmm0
|
||||
; X32-NEXT: ret
|
||||
}
|
||||
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user