Replace string GNU Triples with llvm::Triple in TargetMachine. NFC.

Summary:
For the moment, TargetMachine::getTargetTriple() still returns a StringRef.

This continues the patch series to eliminate StringRef forms of GNU triples
from the internals of LLVM that began in r239036.

Reviewers: rengolin

Reviewed By: rengolin

Subscribers: ted, llvm-commits, rengolin, jholewinski

Differential Revision: http://reviews.llvm.org/D10362

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239554 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Daniel Sanders
2015-06-11 19:41:26 +00:00
parent fd83cb21ce
commit 4ddb0ced90
31 changed files with 190 additions and 193 deletions

View File

@@ -65,15 +65,15 @@ static std::string computeDataLayout(const Triple &TT) {
return Ret;
}
AMDGPUTargetMachine::AMDGPUTargetMachine(const Target &T, StringRef TT,
AMDGPUTargetMachine::AMDGPUTargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS,
TargetOptions Options, Reloc::Model RM,
CodeModel::Model CM,
CodeGenOpt::Level OptLevel)
: LLVMTargetMachine(T, computeDataLayout(Triple(TT)), TT, CPU, FS, Options,
RM, CM, OptLevel),
TLOF(new TargetLoweringObjectFileELF()),
Subtarget(Triple(TT), CPU, FS, *this), IntrinsicInfo() {
: LLVMTargetMachine(T, computeDataLayout(TT), TT, CPU, FS, Options, RM, CM,
OptLevel),
TLOF(new TargetLoweringObjectFileELF()), Subtarget(TT, CPU, FS, *this),
IntrinsicInfo() {
setRequiresStructuredCFG(true);
initAsmInfo();
}
@@ -86,20 +86,21 @@ AMDGPUTargetMachine::~AMDGPUTargetMachine() {
// R600 Target Machine (R600 -> Cayman)
//===----------------------------------------------------------------------===//
R600TargetMachine::R600TargetMachine(const Target &T, StringRef TT, StringRef FS,
StringRef CPU, TargetOptions Options, Reloc::Model RM,
CodeModel::Model CM, CodeGenOpt::Level OL) :
AMDGPUTargetMachine(T, TT, FS, CPU, Options, RM, CM, OL) { }
R600TargetMachine::R600TargetMachine(const Target &T, const Triple &TT,
StringRef FS, StringRef CPU,
TargetOptions Options, Reloc::Model RM,
CodeModel::Model CM, CodeGenOpt::Level OL)
: AMDGPUTargetMachine(T, TT, FS, CPU, Options, RM, CM, OL) {}
//===----------------------------------------------------------------------===//
// GCN Target Machine (SI+)
//===----------------------------------------------------------------------===//
GCNTargetMachine::GCNTargetMachine(const Target &T, StringRef TT, StringRef FS,
StringRef CPU, TargetOptions Options, Reloc::Model RM,
CodeModel::Model CM, CodeGenOpt::Level OL) :
AMDGPUTargetMachine(T, TT, FS, CPU, Options, RM, CM, OL) { }
GCNTargetMachine::GCNTargetMachine(const Target &T, const Triple &TT,
StringRef FS, StringRef CPU,
TargetOptions Options, Reloc::Model RM,
CodeModel::Model CM, CodeGenOpt::Level OL)
: AMDGPUTargetMachine(T, TT, FS, CPU, Options, RM, CM, OL) {}
//===----------------------------------------------------------------------===//
// AMDGPU Pass Setup