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make sure 'special' registers don't get allocated

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21109 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Duraid Madina
2005-04-06 06:17:54 +00:00
parent bede0b7dd7
commit 4ee131ffa8
1 changed files with 13 additions and 4 deletions
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17
lib/Target/IA64/IA64RegisterInfo.td
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@@ -234,9 +234,8 @@ def B6 : GR<0, "b6">;
// in IA64RegisterInfo.cpp // in IA64RegisterInfo.cpp
def GR : RegisterClass<i64, 64, def GR : RegisterClass<i64, 64,
[/*r2,*/ r3, [r3, r8, r9, r10, r11, r14,
r8, r9, r10, r11, r14, /*r15, */ r16, r17, r18, r19, r20, r21, r23,
r16, r17, r18, r19, r20, r21, /*r22,*/ r23,
r24, r25, r26, r27, r28, r29, r30, r31, r24, r25, r26, r27, r28, r29, r30, r31,
r32, r33, r34, r35, r36, r37, r38, r39, r32, r33, r34, r35, r36, r37, r38, r39,
r40, r41, r42, r43, r44, r45, r46, r47, r40, r41, r42, r43, r44, r45, r46, r47,
@@ -249,7 +248,17 @@ def GR : RegisterClass<i64, 64,
r96, r97, r98, r99, r100, r101, r102, r103, r96, r97, r98, r99, r100, r101, r102, r103,
r104, r105, r106, r107, r108, r109, r110, r111, r104, r105, r106, r107, r108, r109, r110, r111,
r112, r113, r114, r115, r116, r117, r118, r119, r112, r113, r114, r115, r116, r117, r118, r119,
r120, r121, r122, r123, r124, r125, r126, r127]>; r120, r121, r122, r123, r124, r125, r126, r127,
r0, r1, r2, r12, r13, r15, r22]> // these last 7 are special (look down)
{
let Methods = [{
iterator allocation_order_end(MachineFunction &MF) const {
return end()-7; // 7 special registers
}
}];
}
// these are the scratch (+stacked) FP registers // these are the scratch (+stacked) FP registers
// ZERO (F0) and ONE (F1) are not here // ZERO (F0) and ONE (F1) are not here