diff --git a/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp b/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp
index 62394faa688..8734e441978 100644
--- a/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp
+++ b/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp
@@ -243,15 +243,6 @@ void ARMInstPrinter::printInst(const MCInst *MI, raw_ostream &O,
     return;
   }
 
-  // Thumb1 NOP
-  if (Opcode == ARM::tMOVr && MI->getOperand(0).getReg() == ARM::R8 &&
-      MI->getOperand(1).getReg() == ARM::R8) {
-    O << "\tnop";
-    printPredicateOperand(MI, 2, O);
-    printAnnotation(O, Annot);
-    return;
-  }
-
   // Combine 2 GPRs from disassember into a GPRPair to match with instr def.
   // ldrexd/strexd require even/odd GPR pair. To enforce this constraint,
   // a single GPRPair reg operand is used in the .td file to replace the two
diff --git a/test/MC/ARM/thumb-nop.s b/test/MC/ARM/thumb-nop.s
index 0b580ea14a9..66f61a6e0b0 100644
--- a/test/MC/ARM/thumb-nop.s
+++ b/test/MC/ARM/thumb-nop.s
@@ -5,5 +5,5 @@
 
         nop
 
-@ CHECK-V6: nop                            @ encoding: [0xc0,0x46]
+@ CHECK-V6: mov r8, r8                     @ encoding: [0xc0,0x46]
 @ CHECK-V7: nop                            @ encoding: [0x00,0xbf]
diff --git a/test/MC/ARM/thumb.s b/test/MC/ARM/thumb.s
index 2223bdcd467..9a725410c3d 100644
--- a/test/MC/ARM/thumb.s
+++ b/test/MC/ARM/thumb.s
@@ -42,7 +42,7 @@
 @ CHECK: bkpt  #2                       @ encoding: [0x02,0xbe]
 
         nop
-@ CHECK: nop @ encoding: [0xc0,0x46]
+@ CHECK: mov r8, r8 @ encoding: [0xc0,0x46]
 
         cpsie aif
 @ CHECK: cpsie aif                      @ encoding: [0x67,0xb6]
diff --git a/test/MC/Disassembler/ARM/thumb1.txt b/test/MC/Disassembler/ARM/thumb1.txt
index de9596aab73..7362d9b9b2d 100644
--- a/test/MC/Disassembler/ARM/thumb1.txt
+++ b/test/MC/Disassembler/ARM/thumb1.txt
@@ -279,9 +279,11 @@
 #------------------------------------------------------------------------------
 # CHECK: mov r3, r4
 # CHECK: movs r1, r3
+# CHECK: mov r8, r8
 
 0x23 0x46
 0x19 0x00
+0xc0 0x46
 
 
 #------------------------------------------------------------------------------
@@ -309,14 +311,6 @@
 0x63 0x42
 
 
-#------------------------------------------------------------------------------
-# NOP
-#------------------------------------------------------------------------------
-# CHECK: nop
-
-0xc0 0x46
-
-
 #------------------------------------------------------------------------------
 # ORR
 #------------------------------------------------------------------------------