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If the target doesn't support f32 natively, insert the FP_EXTEND in target-indep
code, so that the LowerReturn code doesn't have to handle it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25482 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -3377,7 +3377,8 @@ bool SelectionDAGLegalize::ExpandShift(unsigned Opc, SDOperand Op,SDOperand Amt,
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/// Found.
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static void FindLatestCallSeqStart(SDNode *Node, SDNode *&Found,
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std::set<SDNode*> &Visited) {
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if (Node->getNodeDepth() <= Found->getNodeDepth() ||
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if (/*Node->getNodeDepth() <= Found->getNodeDepth() ||*/
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Node->getNumOperands() == 0 ||
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!Visited.insert(Node).second) return;
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// If we found an CALLSEQ_START, we already know this node occurs later
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@ -3404,7 +3405,7 @@ static void FindLatestCallSeqStart(SDNode *Node, SDNode *&Found,
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/// than Found.
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static void FindEarliestCallSeqEnd(SDNode *Node, SDNode *&Found,
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std::set<SDNode*> &Visited) {
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if ((Found && Node->getNodeDepth() >= Found->getNodeDepth()) ||
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if (/*(Found && Node->getNodeDepth() >= Found->getNodeDepth()) ||*/
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!Visited.insert(Node).second) return;
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// If we found an CALLSEQ_END, we already know this node occurs earlier
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@ -490,6 +490,10 @@ void SelectionDAGLowering::visitRet(ReturnInst &I) {
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Op1 = DAG.getNode(ISD::ZERO_EXTEND, TmpVT, Op1);
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break;
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case MVT::f32:
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// If this is a machine where f32 is promoted to f64, do so now.
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if (TLI.getTypeAction(MVT::f32) == TargetLowering::Promote)
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Op1 = DAG.getNode(ISD::FP_EXTEND, TLI.getTypeToTransformTo(MVT::f32),Op1);
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break;
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case MVT::i64:
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case MVT::f64:
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break; // No extension needed!
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