From 4f7092176c3d3eaae0ea7af26aec2d77b3e4035f Mon Sep 17 00:00:00 2001 From: Mihai Popa Date: Tue, 6 Aug 2013 16:07:46 +0000 Subject: [PATCH] This corrects creation of operands for t2PLDW. It also removes the definition of t2PLDWpci, as pldw does not have a literal variant (i.e. pc relative version) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187804 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/ARMInstrThumb2.td | 53 +++++++++---------- .../ARM/Disassembler/ARMDisassembler.cpp | 2 + test/MC/ARM/thumb-diagnostics.s | 5 ++ test/MC/ARM/thumb2-pldw.s | 4 +- 4 files changed, 34 insertions(+), 30 deletions(-) diff --git a/lib/Target/ARM/ARMInstrThumb2.td b/lib/Target/ARM/ARMInstrThumb2.td index e7bd9642271..84086a52739 100644 --- a/lib/Target/ARM/ARMInstrThumb2.td +++ b/lib/Target/ARM/ARMInstrThumb2.td @@ -1604,33 +1604,33 @@ multiclass T2Ipl write, bits<1> instr, string opc> { let DecoderMethod = "DecodeT2LoadShift"; } - - // pci variant is very similar to i12, but supports negative offsets - // from the PC. - def pci : T2Iso<(outs), (ins t2ldrlabel:$addr), IIC_Preload, opc, - "\t$addr", - [(ARMPreload (ARMWrapper tconstpool:$addr), - (i32 write), (i32 instr))]>, - Sched<[WritePreLd]> { - let Inst{31-25} = 0b1111100; - let Inst{24} = instr; - let Inst{22} = 0; - let Inst{21} = write; - let Inst{20} = 1; - let Inst{19-16} = 0b1111; - let Inst{15-12} = 0b1111; - - bits<13> addr; - let Inst{23} = addr{12}; // add = (U == '1') - let Inst{11-0} = addr{11-0}; // imm12 - - let DecoderMethod = "DecodeT2LoadLabel"; - } } -defm t2PLD : T2Ipl<0, 0, "pld">, Requires<[IsThumb2]>; -defm t2PLDW : T2Ipl<1, 0, "pldw">, Requires<[IsThumb2,HasV7,HasMP]>; -defm t2PLI : T2Ipl<0, 1, "pli">, Requires<[IsThumb2,HasV7]>; +defm t2PLD : T2Ipl<0, 0, "pld">, Requires<[IsThumb2]>; +defm t2PLDW : T2Ipl<1, 0, "pldw">, Requires<[IsThumb2,HasV7,HasMP]>; +defm t2PLI : T2Ipl<0, 1, "pli">, Requires<[IsThumb2,HasV7]>; + +// pci variant is very similar to i12, but supports negative offsets +// from the PC. Only PLD and PLI have pci variants (not PLDW) +class T2Iplpci inst, string opc> : T2Iso<(outs), (ins t2ldrlabel:$addr), + IIC_Preload, opc, "\t$addr", + [(ARMPreload (ARMWrapper tconstpool:$addr), + (i32 0), (i32 inst))]>, Sched<[WritePreLd]> { + let Inst{31-25} = 0b1111100; + let Inst{24} = inst; + let Inst{22-20} = 0b001; + let Inst{19-16} = 0b1111; + let Inst{15-12} = 0b1111; + + bits<13> addr; + let Inst{23} = addr{12}; // add = (U == '1') + let Inst{11-0} = addr{11-0}; // imm12 + + let DecoderMethod = "DecodeT2LoadLabel"; +} + +def t2PLDpci : T2Iplpci<0, "pld">, Requires<[IsThumb2]>; +def t2PLIpci : T2Iplpci<1, "pli">, Requires<[IsThumb2,HasV7]>; //===----------------------------------------------------------------------===// // Load / store multiple Instructions. @@ -4425,9 +4425,6 @@ def : t2InstAlias<"add${p} $Rd, pc, $imm", // PLD/PLDW/PLI with alternate literal form. def : t2InstAlias<"pld${p} $addr", (t2PLDpci t2ldr_pcrel_imm12:$addr, pred:$p)>; -def : InstAlias<"pldw${p} $addr", - (t2PLDWpci t2ldr_pcrel_imm12:$addr, pred:$p)>, - Requires<[IsThumb2,HasV7,HasMP]>; def : InstAlias<"pli${p} $addr", (t2PLIpci t2ldr_pcrel_imm12:$addr, pred:$p)>, Requires<[IsThumb2,HasV7]>; diff --git a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp index ce4dbb969e9..8a066643f2a 100644 --- a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp +++ b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp @@ -3354,6 +3354,7 @@ static DecodeStatus DecodeT2LoadImm8(MCInst &Inst, unsigned Insn, switch (Inst.getOpcode()) { case ARM::t2PLDi8: case ARM::t2PLIi8: + case ARM::t2PLDWi8: break; default: if (!Check(S, DecodeGPRRegisterClass(Inst, Rt, Address, Decoder))) @@ -3417,6 +3418,7 @@ static DecodeStatus DecodeT2LoadImm12(MCInst &Inst, unsigned Insn, switch (Inst.getOpcode()) { case ARM::t2PLDi12: + case ARM::t2PLDWi12: case ARM::t2PLIi12: break; default: diff --git a/test/MC/ARM/thumb-diagnostics.s b/test/MC/ARM/thumb-diagnostics.s index 6f822d1c8e8..a194ab4f22e 100644 --- a/test/MC/ARM/thumb-diagnostics.s +++ b/test/MC/ARM/thumb-diagnostics.s @@ -156,3 +156,8 @@ error: invalid operand for instruction @ CHECK-ERRORS: yield @ CHECK-ERRORS: ^ +@------------------------------------------------------------------------------ +@ PLDW required mp-extensions +@------------------------------------------------------------------------------ + pldw [r0, #4] +@ CHECK-ERRORS: error: instruction requires: mp-extensions diff --git a/test/MC/ARM/thumb2-pldw.s b/test/MC/ARM/thumb2-pldw.s index 7acbd39cbd3..f0eeaf9297a 100644 --- a/test/MC/ARM/thumb2-pldw.s +++ b/test/MC/ARM/thumb2-pldw.s @@ -3,5 +3,5 @@ @------------------------------------------------------------------------------ @ PLD(literal) @------------------------------------------------------------------------------ - pldw [pc,#-4095] -@ CHECK: pldw [pc, #-4095] @ encoding: [0x3f,0xf8,0xff,0xff] + pldw [r0, #257] +@ CHECK: pldw [r0, #257] @ encoding: [0xb0,0xf8,0x01,0xf1]