Remove incorrect BL target encoding (it's similar to, but not the same as the

ARM instruction). Add encoding of bits 13 and 11.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120849 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach 2010-12-03 22:33:42 +00:00
parent d91f4e40e6
commit 4fa102b84e

View File

@ -366,16 +366,12 @@ let isCall = 1,
Uses = [SP] in { Uses = [SP] in {
// Also used for Thumb2 // Also used for Thumb2
def tBL : TIx2<0b11110, 0b11, 1, def tBL : TIx2<0b11110, 0b11, 1,
(outs), (ins bltarget:$func, variable_ops), IIC_Br, (outs), (ins i32imm:$func, variable_ops), IIC_Br,
"bl\t$func", "bl\t$func",
[(ARMtcall tglobaladdr:$func)]>, [(ARMtcall tglobaladdr:$func)]>,
Requires<[IsThumb, IsNotDarwin]> { Requires<[IsThumb, IsNotDarwin]> {
bits<24> func; let Inst{13} = 1;
let Inst{26} = func{23}; let Inst{11} = 1;
let Inst{25-16} = func{20-11};
let Inst{13} = func{22};
let Inst{11} = func{21};
let Inst{10-0} = func{10-0};
} }
// ARMv5T and above, also used for Thumb2 // ARMv5T and above, also used for Thumb2
@ -383,7 +379,10 @@ let isCall = 1,
(outs), (ins i32imm:$func, variable_ops), IIC_Br, (outs), (ins i32imm:$func, variable_ops), IIC_Br,
"blx\t$func", "blx\t$func",
[(ARMcall tglobaladdr:$func)]>, [(ARMcall tglobaladdr:$func)]>,
Requires<[IsThumb, HasV5T, IsNotDarwin]>; Requires<[IsThumb, HasV5T, IsNotDarwin]> {
let Inst{13} = 1;
let Inst{11} = 1;
}
// Also used for Thumb2 // Also used for Thumb2
def tBLXr : TI<(outs), (ins GPR:$func, variable_ops), IIC_Br, def tBLXr : TI<(outs), (ins GPR:$func, variable_ops), IIC_Br,
@ -413,16 +412,12 @@ let isCall = 1,
Uses = [R7, SP] in { Uses = [R7, SP] in {
// Also used for Thumb2 // Also used for Thumb2
def tBLr9 : TIx2<0b11110, 0b11, 1, def tBLr9 : TIx2<0b11110, 0b11, 1,
(outs), (ins pred:$p, bltarget:$func, variable_ops), IIC_Br, (outs), (ins pred:$p, i32imm:$func, variable_ops), IIC_Br,
"bl${p}\t$func", "bl${p}\t$func",
[(ARMtcall tglobaladdr:$func)]>, [(ARMtcall tglobaladdr:$func)]>,
Requires<[IsThumb, IsDarwin]> { Requires<[IsThumb, IsDarwin]> {
bits<24> func; let Inst{13} = 1;
let Inst{26} = func{23}; let Inst{11} = 1;
let Inst{25-16} = func{20-11};
let Inst{13} = func{22};
let Inst{11} = func{21};
let Inst{10-0} = func{10-0};
} }
// ARMv5T and above, also used for Thumb2 // ARMv5T and above, also used for Thumb2
@ -430,7 +425,10 @@ let isCall = 1,
(outs), (ins pred:$p, i32imm:$func, variable_ops), IIC_Br, (outs), (ins pred:$p, i32imm:$func, variable_ops), IIC_Br,
"blx${p}\t$func", "blx${p}\t$func",
[(ARMcall tglobaladdr:$func)]>, [(ARMcall tglobaladdr:$func)]>,
Requires<[IsThumb, HasV5T, IsDarwin]>; Requires<[IsThumb, HasV5T, IsDarwin]> {
let Inst{13} = 1;
let Inst{11} = 1;
}
// Also used for Thumb2 // Also used for Thumb2
def tBLXr_r9 : TI<(outs), (ins pred:$p, GPR:$func, variable_ops), IIC_Br, def tBLXr_r9 : TI<(outs), (ins pred:$p, GPR:$func, variable_ops), IIC_Br,