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ARM: Allocation hints must make sure to be in the alloc order.

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When creating an allocation hint for a register pair, make sure the hint
for the physical register reference is still in the allocation order.

rdar://13240556

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175541 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach 2013-02-19 18:55:36 +00:00
parent da5f1ed640
commit 4fd4c91c40
2 changed files with 55 additions and 1 deletions
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3
lib/Target/ARM/ARMBaseRegisterInfo.cpp
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@ -205,7 +205,8 @@ ARMBaseRegisterInfo::getRegAllocationHints(unsigned VirtReg,
}
// First prefer the paired physreg.
if (PairedPhys)
if (PairedPhys &&
std::find(Order.begin(), Order.end(), PairedPhys) != Order.end())
Hints.push_back(PairedPhys);
// Then prefer even or odd registers.

53
test/CodeGen/Thumb2/2013-02-19-tail-call-register-hint.ll Normal file
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@ -0,0 +1,53 @@
; RUN: llc < %s -mtriple=thumbv7s-apple-ios6.0.0 -verify-machineinstrs
; Check to make sure the tail-call return at the end doesn't use a
; callee-saved register. Register hinting from t2LDRDri was getting this
; wrong. The intervening call will force allocation to try a high register
; first, so the hint will attempt to fire, but must be rejected due to
; not being in the allocation order for the tcGPR register class.
; The machine instruction verifier will make sure that all actually worked
; out the way it's supposed to.
%"myclass" = type { %struct.foo }
%struct.foo = type { i32, [40 x i8] }
define hidden void @func(i8* %Data) nounwind ssp {
%1 = getelementptr inbounds i8* %Data, i32 12
%2 = bitcast i8* %1 to %"myclass"*
tail call void @abc(%"myclass"* %2) nounwind
tail call void @def(%"myclass"* %2) nounwind
%3 = getelementptr inbounds i8* %Data, i32 8
%4 = bitcast i8* %3 to i8**
%5 = load i8** %4, align 4, !tbaa !0
tail call void @ghi(i8* %5) nounwind
%6 = bitcast i8* %Data to void (i8*)**
%7 = load void (i8*)** %6, align 4, !tbaa !0
%8 = getelementptr inbounds i8* %Data, i32 4
%9 = bitcast i8* %8 to i8**
%10 = load i8** %9, align 4, !tbaa !0
%11 = icmp eq i8* %Data, null
br i1 %11, label %14, label %12
; <label>:12 ; preds = %0
%13 = tail call %"myclass"* @jkl(%"myclass"* %2) nounwind
tail call void @mno(i8* %Data) nounwind
br label %14
; <label>:14 ; preds = %12, %0
tail call void %7(i8* %10) nounwind
ret void
}
declare void @mno(i8*)
declare void @def(%"myclass"*)
declare void @abc(%"myclass"*)
declare void @ghi(i8*)
declare %"myclass"* @jkl(%"myclass"*) nounwind
!0 = metadata !{metadata !"any pointer", metadata !1}
!1 = metadata !{metadata !"omnipotent char", metadata !2}
!2 = metadata !{metadata !"Simple C/C++ TBAA"}