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[aarch32] fix bug 18268: Incorrect condition of vsel

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Given vsel_cc, op1, op2, since vsel has no LE/LT, to generate vsel for
such selection, it needs to inverse cc and swap op1 and op2. To inverse
cc, both L/G and E bits should be flipped.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197615 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Weiming Zhao 2013-12-18 22:25:17 +00:00
parent 5112542840
commit 4fdb649f3a
2 changed files with 5 additions and 5 deletions
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2
lib/Target/ARM/ARMISelLowering.cpp
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@ -3232,7 +3232,7 @@ SDValue ARMTargetLowering::LowerSELECT(SDValue Op, SelectionDAG &DAG) const {
static ISD::CondCode getInverseCCForVSEL(ISD::CondCode CC) { static ISD::CondCode getInverseCCForVSEL(ISD::CondCode CC) {
if (CC == ISD::SETNE) if (CC == ISD::SETNE)
return ISD::SETEQ; return ISD::SETEQ;
return ISD::getSetCCSwappedOperands(CC); return ISD::getSetCCInverse(CC, true);
} }
static void checkVSELConstraints(ISD::CondCode CC, ARMCC::CondCodes &CondCode, static void checkVSELConstraints(ISD::CondCode CC, ARMCC::CondCodes &CondCode,

8
test/CodeGen/ARM/vsel.ll
View File

@ -61,7 +61,7 @@ define void @test_vsel32slt(i32 %lhs32, i32 %rhs32, float %a, float %b) {
%val1 = select i1 %tst1, float %a, float %b %val1 = select i1 %tst1, float %a, float %b
store float %val1, float* @varfloat store float %val1, float* @varfloat
; CHECK: cmp r0, r1 ; CHECK: cmp r0, r1
; CHECK: vselgt.f32 s0, s1, s0 ; CHECK: vselge.f32 s0, s1, s0
ret void ret void
} }
define void @test_vsel64slt(i32 %lhs32, i32 %rhs32, double %a, double %b) { define void @test_vsel64slt(i32 %lhs32, i32 %rhs32, double %a, double %b) {
@ -70,7 +70,7 @@ define void @test_vsel64slt(i32 %lhs32, i32 %rhs32, double %a, double %b) {
%val1 = select i1 %tst1, double %a, double %b %val1 = select i1 %tst1, double %a, double %b
store double %val1, double* @vardouble store double %val1, double* @vardouble
; CHECK: cmp r0, r1 ; CHECK: cmp r0, r1
; CHECK: vselgt.f64 d16, d1, d0 ; CHECK: vselge.f64 d16, d1, d0
ret void ret void
} }
define void @test_vsel32sle(i32 %lhs32, i32 %rhs32, float %a, float %b) { define void @test_vsel32sle(i32 %lhs32, i32 %rhs32, float %a, float %b) {
@ -79,7 +79,7 @@ define void @test_vsel32sle(i32 %lhs32, i32 %rhs32, float %a, float %b) {
%val1 = select i1 %tst1, float %a, float %b %val1 = select i1 %tst1, float %a, float %b
store float %val1, float* @varfloat store float %val1, float* @varfloat
; CHECK: cmp r0, r1 ; CHECK: cmp r0, r1
; CHECK: vselge.f32 s0, s1, s0 ; CHECK: vselgt.f32 s0, s1, s0
ret void ret void
} }
define void @test_vsel64sle(i32 %lhs32, i32 %rhs32, double %a, double %b) { define void @test_vsel64sle(i32 %lhs32, i32 %rhs32, double %a, double %b) {
@ -88,7 +88,7 @@ define void @test_vsel64sle(i32 %lhs32, i32 %rhs32, double %a, double %b) {
%val1 = select i1 %tst1, double %a, double %b %val1 = select i1 %tst1, double %a, double %b
store double %val1, double* @vardouble store double %val1, double* @vardouble
; CHECK: cmp r0, r1 ; CHECK: cmp r0, r1
; CHECK: vselge.f64 d16, d1, d0 ; CHECK: vselgt.f64 d16, d1, d0
ret void ret void
} }
define void @test_vsel32ogt(float %lhs32, float %rhs32, float %a, float %b) { define void @test_vsel32ogt(float %lhs32, float %rhs32, float %a, float %b) {