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Another 80 col violation.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101620 91177308-0d34-0410-b5e6-96231b3b80d8
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Evan Cheng
2010-04-17 06:12:32 +00:00
parent 9f3f061d74
commit 4ff28527bb
1 changed files with 2 additions and 1 deletions
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3
lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
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@@ -1385,7 +1385,8 @@ void DAGTypeLegalizer::ExpandIntRes_AssertSext(SDNode *N,
if (NVTBits < EVTBits) { if (NVTBits < EVTBits) {
Hi = DAG.getNode(ISD::AssertSext, dl, NVT, Hi, Hi = DAG.getNode(ISD::AssertSext, dl, NVT, Hi,
DAG.getValueType(EVT::getIntegerVT(*DAG.getContext(), EVTBits - NVTBits))); DAG.getValueType(EVT::getIntegerVT(*DAG.getContext(),
EVTBits - NVTBits)));
} else { } else {
Lo = DAG.getNode(ISD::AssertSext, dl, NVT, Lo, DAG.getValueType(EVT)); Lo = DAG.getNode(ISD::AssertSext, dl, NVT, Lo, DAG.getValueType(EVT));
// The high part replicates the sign bit of Lo, make it explicit. // The high part replicates the sign bit of Lo, make it explicit.