6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-06-20 10:24:12 +00:00
Code Issues Projects Releases Wiki Activity

Minor cleanups:

Browse Source 
* avoid calling getClass() multiple times (it is relatively expensive)
  * Allow -disable-fp-elim to turn of frame pointer elimination.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23104 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner
2005-08-26 21:49:18 +00:00
parent 579cfabdad
commit 5087daac23
1 changed files with 8 additions and 7 deletions
Download Patch File Download Diff File Expand all files Collapse all files

15
lib/Target/PowerPC/PPCRegisterInfo.cpp
View File

@ -81,11 +81,12 @@ PPC32RegisterInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
static const unsigned Opcode[] = { static const unsigned Opcode[] = {
PPC::STB, PPC::STH, PPC::STW, PPC::STFS, PPC::STFD PPC::STB, PPC::STH, PPC::STW, PPC::STFS, PPC::STFD
}; };
unsigned OC = Opcode[getIdx(getClass(SrcReg))]; const TargetRegisterClass *RegClass = getClass(SrcReg);
unsigned OC = Opcode[getIdx(RegClass)];
if (SrcReg == PPC::LR) { if (SrcReg == PPC::LR) {
BuildMI(MBB, MI, PPC::MFLR, 1, PPC::R11); BuildMI(MBB, MI, PPC::MFLR, 1, PPC::R11);
addFrameReference(BuildMI(MBB, MI, OC, 3).addReg(PPC::R11),FrameIdx); addFrameReference(BuildMI(MBB, MI, OC, 3).addReg(PPC::R11),FrameIdx);
} else if (PPC32::CRRCRegisterClass == getClass(SrcReg)) { } else if (RegClass == PPC32::CRRCRegisterClass) {
BuildMI(MBB, MI, PPC::MFCR, 0, PPC::R11); BuildMI(MBB, MI, PPC::MFCR, 0, PPC::R11);
addFrameReference(BuildMI(MBB, MI, OC, 3).addReg(PPC::R11),FrameIdx); addFrameReference(BuildMI(MBB, MI, OC, 3).addReg(PPC::R11),FrameIdx);
} else { } else {
@ -96,15 +97,16 @@ PPC32RegisterInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
void void
PPC32RegisterInfo::loadRegFromStackSlot(MachineBasicBlock &MBB, PPC32RegisterInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI, MachineBasicBlock::iterator MI,
unsigned DestReg, int FrameIdx) const{ unsigned DestReg, int FrameIdx) const {
static const unsigned Opcode[] = { static const unsigned Opcode[] = {
PPC::LBZ, PPC::LHZ, PPC::LWZ, PPC::LFS, PPC::LFD PPC::LBZ, PPC::LHZ, PPC::LWZ, PPC::LFS, PPC::LFD
}; };
unsigned OC = Opcode[getIdx(getClass(DestReg))]; const TargetRegisterClass *RegClass = getClass(SrcReg);
unsigned OC = Opcode[getIdx(RegClass)];
if (DestReg == PPC::LR) { if (DestReg == PPC::LR) {
addFrameReference(BuildMI(MBB, MI, OC, 2, PPC::R11), FrameIdx); addFrameReference(BuildMI(MBB, MI, OC, 2, PPC::R11), FrameIdx);
BuildMI(MBB, MI, PPC::MTLR, 1).addReg(PPC::R11); BuildMI(MBB, MI, PPC::MTLR, 1).addReg(PPC::R11);
} else if (PPC32::CRRCRegisterClass == getClass(DestReg)) { } else if (RegClass == PPC32::CRRCRegisterClass) {
addFrameReference(BuildMI(MBB, MI, OC, 2, PPC::R11), FrameIdx); addFrameReference(BuildMI(MBB, MI, OC, 2, PPC::R11), FrameIdx);
BuildMI(MBB, MI, PPC::MTCRF, 1, DestReg).addReg(PPC::R11); BuildMI(MBB, MI, PPC::MTCRF, 1, DestReg).addReg(PPC::R11);
} else { } else {
@ -139,8 +141,7 @@ void PPC32RegisterInfo::copyRegToReg(MachineBasicBlock &MBB,
// if frame pointer elimination is disabled. // if frame pointer elimination is disabled.
// //
static bool hasFP(MachineFunction &MF) { static bool hasFP(MachineFunction &MF) {
MachineFrameInfo *MFI = MF.getFrameInfo(); return NoFramePointerElim || MF.getFrameInfo()->hasVarSizedObjects();
return MFI->hasVarSizedObjects();
} }
void PPC32RegisterInfo:: void PPC32RegisterInfo::