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[MC] Require an MCContext when constructing an MCDisassembler.

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This patch re-introduces the MCContext member that was removed from
MCDisassembler in r206063, and requires that an MCContext be passed in at
MCDisassembler construction time. (Previously the MCContext member had been
initialized in an ad-hoc fashion after construction). The MCCContext member
can be used by MCDisassembler sub-classes to construct constant or
target-specific MCExprs.

This patch updates disassemblers for in-tree targets, and provides the
MCRegisterInfo instance that some disassemblers were using through the
MCContext (previously those backends were constructing their own
MCRegisterInfo instances).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206241 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Lang Hames
2014-04-15 04:40:56 +00:00
parent 88f353252d
commit 508bd63046
17 changed files with 119 additions and 80 deletions
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39
lib/Target/Mips/Disassembler/MipsDisassembler.cpp
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@@ -14,6 +14,7 @@
#include "Mips.h"
#include "MipsRegisterInfo.h"
#include "MipsSubtarget.h"
#include "llvm/MC/MCContext.h"
#include "llvm/MC/MCDisassembler.h"
#include "llvm/MC/MCFixedLenDisassembler.h"
#include "llvm/MC/MCInst.h"
@@ -33,19 +34,16 @@ class MipsDisassemblerBase : public MCDisassembler {
public:
/// Constructor - Initializes the disassembler.
///
MipsDisassemblerBase(const MCSubtargetInfo &STI, const MCRegisterInfo *Info,
MipsDisassemblerBase(const MCSubtargetInfo &STI, MCContext &Ctx,
bool bigEndian) :
MCDisassembler(STI), RegInfo(Info),
MCDisassembler(STI, Ctx),
IsN64(STI.getFeatureBits() & Mips::FeatureN64), isBigEndian(bigEndian) {}
virtual ~MipsDisassemblerBase() {}
const MCRegisterInfo *getRegInfo() const { return RegInfo.get(); }
bool isN64() const { return IsN64; }
private:
OwningPtr<const MCRegisterInfo> RegInfo;
bool IsN64;
protected:
bool isBigEndian;
@@ -57,9 +55,9 @@ class MipsDisassembler : public MipsDisassemblerBase {
public:
/// Constructor - Initializes the disassembler.
///
MipsDisassembler(const MCSubtargetInfo &STI, const MCRegisterInfo *Info,
MipsDisassembler(const MCSubtargetInfo &STI, MCContext &Ctx,
bool bigEndian) :
MipsDisassemblerBase(STI, Info, bigEndian) {
MipsDisassemblerBase(STI, Ctx, bigEndian) {
IsMicroMips = STI.getFeatureBits() & Mips::FeatureMicroMips;
}
@@ -78,9 +76,9 @@ class Mips64Disassembler : public MipsDisassemblerBase {
public:
/// Constructor - Initializes the disassembler.
///
Mips64Disassembler(const MCSubtargetInfo &STI, const MCRegisterInfo *Info,
Mips64Disassembler(const MCSubtargetInfo &STI, MCContext &Ctx,
bool bigEndian) :
MipsDisassemblerBase(STI, Info, bigEndian) {}
MipsDisassemblerBase(STI, Ctx, bigEndian) {}
/// getInstruction - See MCDisassembler.
virtual DecodeStatus getInstruction(MCInst &instr,
@@ -275,26 +273,30 @@ extern Target TheMipselTarget, TheMipsTarget, TheMips64Target,
static MCDisassembler *createMipsDisassembler(
const Target &T,
const MCSubtargetInfo &STI) {
return new MipsDisassembler(STI, T.createMCRegInfo(""), true);
const MCSubtargetInfo &STI,
MCContext &Ctx) {
return new MipsDisassembler(STI, Ctx, true);
}
static MCDisassembler *createMipselDisassembler(
const Target &T,
const MCSubtargetInfo &STI) {
return new MipsDisassembler(STI, T.createMCRegInfo(""), false);
const MCSubtargetInfo &STI,
MCContext &Ctx) {
return new MipsDisassembler(STI, Ctx, false);
}
static MCDisassembler *createMips64Disassembler(
const Target &T,
const MCSubtargetInfo &STI) {
return new Mips64Disassembler(STI, T.createMCRegInfo(""), true);
const MCSubtargetInfo &STI,
MCContext &Ctx) {
return new Mips64Disassembler(STI, Ctx, true);
}
static MCDisassembler *createMips64elDisassembler(
const Target &T,
const MCSubtargetInfo &STI) {
return new Mips64Disassembler(STI, T.createMCRegInfo(""), false);
const MCSubtargetInfo &STI,
MCContext &Ctx) {
return new Mips64Disassembler(STI, Ctx, false);
}
extern "C" void LLVMInitializeMipsDisassembler() {
@@ -471,7 +473,8 @@ Mips64Disassembler::getInstruction(MCInst &instr,
static unsigned getReg(const void *D, unsigned RC, unsigned RegNo) {
const MipsDisassemblerBase *Dis = static_cast<const MipsDisassemblerBase*>(D);
return *(Dis->getRegInfo()->getRegClass(RC).begin() + RegNo);
const MCRegisterInfo *RegInfo = Dis->getContext().getRegisterInfo();
return *(RegInfo->getRegClass(RC).begin() + RegNo);
}
static DecodeStatus DecodeCPU16RegsRegisterClass(MCInst &Inst,