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Thumb2 assembly parsing and encoding for SSAX.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139929 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -4950,6 +4950,8 @@ def : MnemonicAlias<"saddsubx", "sasx">;
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def : MnemonicAlias<"shaddsubx", "shasx">;
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// SHSAX == SHSUBADDX
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def : MnemonicAlias<"shsubaddx", "shsax">;
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// SSAX == SSUBADDX
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def : MnemonicAlias<"ssubaddx", "ssax">;
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// LDRSBT/LDRHT/LDRSHT post-index offset if optional.
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// Note that the write-back output register is a dummy operand for MC (it's
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@ -2074,6 +2074,24 @@ _func:
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@ CHECK: ssat16 r3, #16, r5 @ encoding: [0x25,0xf3,0x0f,0x03]
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@------------------------------------------------------------------------------
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@ SSAX
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@------------------------------------------------------------------------------
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ssubaddx r2, r3, r4
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it lt
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ssubaddxlt r2, r3, r4
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ssax r2, r3, r4
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it lt
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ssaxlt r2, r3, r4
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@ CHECK: ssax r2, r3, r4 @ encoding: [0xe3,0xfa,0x04,0xf2]
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@ CHECK: it lt @ encoding: [0xb8,0xbf]
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@ CHECK: ssaxlt r2, r3, r4 @ encoding: [0xe3,0xfa,0x04,0xf2]
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@ CHECK: ssax r2, r3, r4 @ encoding: [0xe3,0xfa,0x04,0xf2]
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@ CHECK: it lt @ encoding: [0xb8,0xbf]
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@ CHECK: ssaxlt r2, r3, r4 @ encoding: [0xe3,0xfa,0x04,0xf2]
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@------------------------------------------------------------------------------
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@ SUB (register)
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@------------------------------------------------------------------------------
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