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When transforming a vector_shuffle to a load, the base address must not be an undef.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50940 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2008-05-10 06:46:49 +00:00
parent 49ff661410
commit 50d9e7289b
2 changed files with 12 additions and 0 deletions
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2
lib/Target/X86/X86ISelLowering.cpp
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@ -6283,6 +6283,8 @@ static bool EltsFromConsecutiveLoads(SDNode *N, SDOperand PermMask,
return false;
if (!Base) {
Base = Elt.Val;
if (Base->getOpcode() == ISD::UNDEF)
return false;
continue;
}
if (Elt.getOpcode() == ISD::UNDEF)

10
test/CodeGen/X86/2008-05-09-ShuffleLoweringBug.ll Normal file
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@ -0,0 +1,10 @@
; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2
define fastcc void @glgVectorFloatConversion() nounwind {
%tmp12745 = load <4 x float>* null, align 16 ; <<4 x float>> [#uses=1]
%tmp12773 = insertelement <4 x float> %tmp12745, float 1.000000e+00, i32 1 ; <<4 x float>> [#uses=1]
%tmp12774 = insertelement <4 x float> %tmp12773, float 0.000000e+00, i32 2 ; <<4 x float>> [#uses=1]
%tmp12775 = insertelement <4 x float> %tmp12774, float 1.000000e+00, i32 3 ; <<4 x float>> [#uses=1]
store <4 x float> %tmp12775, <4 x float>* null, align 16
unreachable
}