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R600/SI: Define a schedule model and enable the generic machine scheduler

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The schedule model is not complete yet, and could be improved.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227461 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Tom Stellard
2015-01-29 16:55:25 +00:00
parent 48a3c8261f
commit 51a3c27d6e
32 changed files with 192 additions and 117 deletions
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2
test/CodeGen/R600/or.ll
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@@ -168,7 +168,7 @@ define void @or_i1(float addrspace(1)* %out, float addrspace(1)* %in0, float add
}
; FUNC-LABEL: {{^}}s_or_i1:
; SI: s_or_b64 s[{{[0-9]+:[0-9]+}}], s[{{[0-9]+:[0-9]+}}], vcc
; SI: s_or_b64 s[{{[0-9]+:[0-9]+}}], vcc, s[{{[0-9]+:[0-9]+}}]
define void @s_or_i1(i1 addrspace(1)* %out, i32 %a, i32 %b, i32 %c, i32 %d) {
%cmp0 = icmp eq i32 %a, %b
%cmp1 = icmp eq i32 %c, %d