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R600/SI: Define a schedule model and enable the generic machine scheduler

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The schedule model is not complete yet, and could be improved.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227461 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Tom Stellard
2015-01-29 16:55:25 +00:00
parent 48a3c8261f
commit 51a3c27d6e
32 changed files with 192 additions and 117 deletions
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2
test/CodeGen/R600/zero_extend.ll
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@@ -30,9 +30,9 @@ entry:
}
; SI-CHECK-LABEL: {{^}}zext_i1_to_i64:
; SI-CHECK: s_mov_b32 s{{[0-9]+}}, 0
; SI-CHECK: v_cmp_eq_i32
; SI-CHECK: v_cndmask_b32
; SI-CHECK: s_mov_b32 s{{[0-9]+}}, 0
define void @zext_i1_to_i64(i64 addrspace(1)* %out, i32 %a, i32 %b) nounwind {
%cmp = icmp eq i32 %a, %b
%ext = zext i1 %cmp to i64