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https://github.com/c64scene-ar/llvm-6502.git
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Add floating-point to and from integer conversion
This patch add altivec support for v4i32 to v4f32 and for v4f32 to v4i32 vector rounding conversion. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165409 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -373,6 +373,10 @@ PPCTargetLowering::PPCTargetLowering(PPCTargetMachine &TM)
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setOperationAction(ISD::LOAD , MVT::v4i32, Legal);
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setOperationAction(ISD::SELECT, MVT::v4i32, Expand);
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setOperationAction(ISD::STORE , MVT::v4i32, Legal);
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setOperationAction(ISD::FP_TO_SINT, MVT::v4i32, Legal);
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setOperationAction(ISD::FP_TO_UINT, MVT::v4i32, Legal);
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setOperationAction(ISD::SINT_TO_FP, MVT::v4i32, Legal);
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setOperationAction(ISD::UINT_TO_FP, MVT::v4i32, Legal);
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addRegisterClass(MVT::v4f32, &PPC::VRRCRegClass);
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addRegisterClass(MVT::v4i32, &PPC::VRRCRegClass);
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@@ -340,6 +340,28 @@ def VCTUXS : VXForm_1<906, (outs VRRC:$vD), (ins u5imm:$UIMM, VRRC:$vB),
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"vctuxs $vD, $vB, $UIMM", VecFP,
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[(set VRRC:$vD,
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(int_ppc_altivec_vctuxs VRRC:$vB, imm:$UIMM))]>;
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// Defines with the UIM field set to 0 for floating-point
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// to integer (fp_to_sint/fp_to_uint) conversions and integer
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// to floating-point (sint_to_fp/uint_to_fp) conversions.
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let VA = 0 in {
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def VCFSX_0 : VXForm_1<842, (outs VRRC:$vD), (ins VRRC:$vB),
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"vcfsx $vD, $vB, 0", VecFP,
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[(set VRRC:$vD,
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(int_ppc_altivec_vcfsx VRRC:$vB, 0))]>;
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def VCTUXS_0 : VXForm_1<906, (outs VRRC:$vD), (ins VRRC:$vB),
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"vctuxs $vD, $vB, 0", VecFP,
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[(set VRRC:$vD,
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(int_ppc_altivec_vctuxs VRRC:$vB, 0))]>;
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def VCFUX_0 : VXForm_1<778, (outs VRRC:$vD), (ins VRRC:$vB),
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"vcfux $vD, $vB, 0", VecFP,
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[(set VRRC:$vD,
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(int_ppc_altivec_vcfux VRRC:$vB, 0))]>;
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def VCTSXS_0 : VXForm_1<970, (outs VRRC:$vD), (ins VRRC:$vB),
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"vctsxs $vD, $vB, 0", VecFP,
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[(set VRRC:$vD,
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(int_ppc_altivec_vctsxs VRRC:$vB, 0))]>;
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}
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def VEXPTEFP : VX2_Int<394, "vexptefp", int_ppc_altivec_vexptefp>;
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def VLOGEFP : VX2_Int<458, "vlogefp", int_ppc_altivec_vlogefp>;
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@@ -689,3 +711,13 @@ def : Pat<(v8i16 (sra (v8i16 VRRC:$vA), (v8i16 VRRC:$vB))),
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(v8i16 (VSRAH VRRC:$vA, VRRC:$vB))>;
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def : Pat<(v4i32 (sra (v4i32 VRRC:$vA), (v4i32 VRRC:$vB))),
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(v4i32 (VSRAW VRRC:$vA, VRRC:$vB))>;
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// Float to integer and integer to float conversions
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def : Pat<(v4i32 (fp_to_sint (v4f32 VRRC:$vA))),
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(VCTSXS_0 VRRC:$vA)>;
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def : Pat<(v4i32 (fp_to_uint (v4f32 VRRC:$vA))),
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(VCTUXS_0 VRRC:$vA)>;
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def : Pat<(v4f32 (sint_to_fp (v4i32 VRRC:$vA))),
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(VCFSX_0 VRRC:$vA)>;
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def : Pat<(v4f32 (uint_to_fp (v4i32 VRRC:$vA))),
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(VCFUX_0 VRRC:$vA)>;
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