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[X86] Fix assertion failure caused by a wrong folding of vector shifts by immediate count.

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This fixes a regression intruced by r198113.

Revision r198113 introduced an algorithm that tries to fold a vector shift
by immediate count into a build_vector if the input vector is a known vector
of constants.

However the algorithm only worked under the assumption that the input vector
type and the shift type are exactly the same.

This patch disables the folding of vector shift by immediate count if the
input vector type and the shift value type are not the same.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199213 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Andrea Di Biagio 2014-01-14 13:17:12 +00:00
parent 6849f102ca
commit 527fa8c18c
2 changed files with 39 additions and 2 deletions
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5
lib/Target/X86/X86ISelLowering.cpp
View File

@ -11118,8 +11118,9 @@ static SDValue getTargetVShiftByConstNode(unsigned Opc, SDLoc dl, MVT VT,
&& "Unknown target vector shift-by-constant node");
// Fold this packed vector shift into a build vector if SrcOp is a
// vector of ConstantSDNodes or UNDEFs.
if (ISD::isBuildVectorOfConstantSDNodes(SrcOp.getNode())) {
// vector of Constants or UNDEFs, and SrcOp valuetype is the same as VT.
if (VT == SrcOp.getSimpleValueType() &&
ISD::isBuildVectorOfConstantSDNodes(SrcOp.getNode())) {
SmallVector<SDValue, 8> Elts;
unsigned NumElts = SrcOp->getNumOperands();
ConstantSDNode *ND;

36
test/CodeGen/X86/vshift-6.ll Normal file
View File

@ -0,0 +1,36 @@
; RUN: llc < %s -mcpu=corei7 -march=x86-64 -mattr=+sse2 | FileCheck %s
; This test makes sure that the compiler does not crash with an
; assertion failure when trying to fold a vector shift left
; by immediate count if the type of the input vector is different
; to the result type.
;
; This happens for example when lowering a shift left of a MVT::v16i8 vector.
; This is custom lowered into the following sequence:
; count << 5
; A = VSHLI(MVT::v8i16, r & (char16)15, 4)
; B = BITCAST MVT::v16i8, A
; VSELECT(r, B, count);
; count += count
; C = VSHLI(MVT::v8i16, r & (char16)63, 2)
; D = BITCAST MVT::v16i8, C
; r = VSELECT(r, C, count);
; count += count
; VSELECT(r, r+r, count);
; count = count << 5;
;
; Where 'r' is a vector of type MVT::v16i8, and
; 'count' is the vector shift count.
define <16 x i8> @do_not_crash(i8*, i32*, i64*, i32, i64, i8) {
entry:
store i8 %5, i8* %0
%L5 = load i8* %0
%I8 = insertelement <16 x i8> <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>, i8 %L5, i32 7
%B51 = shl <16 x i8> <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>, %I8
ret <16 x i8> %B51
}
; CHECK-LABEL: do_not_crash
; CHECK: ret