From 53dfa78e4133f6cdb5d860279adc337ea099ac15 Mon Sep 17 00:00:00 2001 From: Duncan Sands Date: Fri, 4 Mar 2011 14:28:59 +0000 Subject: [PATCH] Revert commit 126684 "Use the correct shift amount type". It is only the correct type after type legalization has completed. Before then it may simply not be big enough to hold the shift amount, particularly on x86 which uses a very small type for shifts (this issue broke stuff in the past which is why LegalizeTypes carefully uses a large type for shift amounts). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127000 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp b/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp index 0f7359d832a..935aab0e59a 100644 --- a/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp +++ b/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp @@ -226,7 +226,7 @@ SDValue DAGTypeLegalizer::PromoteIntRes_BSWAP(SDNode *N) { unsigned DiffBits = NVT.getSizeInBits() - OVT.getSizeInBits(); return DAG.getNode(ISD::SRL, dl, NVT, DAG.getNode(ISD::BSWAP, dl, NVT, Op), - DAG.getConstant(DiffBits, TLI.getShiftAmountTy(NVT))); + DAG.getConstant(DiffBits, TLI.getPointerTy())); } SDValue DAGTypeLegalizer::PromoteIntRes_BUILD_PAIR(SDNode *N) {