From 53ec2035eb686c25013d47405fd0b178b60d59c8 Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Sat, 17 Dec 2005 20:47:16 +0000 Subject: [PATCH] add patterns for FP stores git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24790 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/Sparc/SparcInstrInfo.td | 32 ++++++++++---------------- lib/Target/SparcV8/SparcV8InstrInfo.td | 32 ++++++++++---------------- 2 files changed, 24 insertions(+), 40 deletions(-) diff --git a/lib/Target/Sparc/SparcInstrInfo.td b/lib/Target/Sparc/SparcInstrInfo.td index 2cafd24d029..efe40531c69 100644 --- a/lib/Target/Sparc/SparcInstrInfo.td +++ b/lib/Target/Sparc/SparcInstrInfo.td @@ -206,29 +206,21 @@ def STDri : F3_2<3, 0b000111, // Section B.5 - Store Floating-point Instructions, p. 97 def STFrr : F3_1<3, 0b100100, - (ops MEMrr:$addr, IntRegs:$src), - "st $src, [$addr]", []>; + (ops MEMrr:$addr, FPRegs:$src), + "st $src, [$addr]", + [(store FPRegs:$src, ADDRrr:$addr)]>; def STFri : F3_2<3, 0b100100, - (ops MEMri:$addr, IntRegs:$src), - "st $src, [$addr]", []>; + (ops MEMri:$addr, FPRegs:$src), + "st $src, [$addr]", + [(store FPRegs:$src, ADDRri:$addr)]>; def STDFrr : F3_1<3, 0b100111, - (ops MEMrr:$addr, IntRegs:$src), - "std $src, [$addr]", []>; + (ops MEMrr:$addr, DFPRegs:$src), + "std $src, [$addr]", + [(store DFPRegs:$src, ADDRrr:$addr)]>; def STDFri : F3_2<3, 0b100111, - (ops MEMri:$addr, IntRegs:$src), - "std $src, [$addr]", []>; -def STFSRrr : F3_1<3, 0b100101, - (ops MEMrr:$addr, IntRegs:$src), - "st $src, [$addr]", []>; -def STFSRri : F3_2<3, 0b100101, - (ops MEMri:$addr, IntRegs:$src), - "st $src, [$addr]", []>; -def STDFQrr : F3_1<3, 0b100110, - (ops MEMrr:$addr, IntRegs:$src), - "std $src, [$addr]", []>; -def STDFQri : F3_2<3, 0b100110, - (ops MEMri:$addr, IntRegs:$src), - "std $src, [$addr]", []>; + (ops MEMri:$addr, DFPRegs:$src), + "std $src, [$addr]", + [(store DFPRegs:$src, ADDRri:$addr)]>; // Section B.9 - SETHI Instruction, p. 104 def SETHIi: F2_1<0b100, diff --git a/lib/Target/SparcV8/SparcV8InstrInfo.td b/lib/Target/SparcV8/SparcV8InstrInfo.td index 2cafd24d029..efe40531c69 100644 --- a/lib/Target/SparcV8/SparcV8InstrInfo.td +++ b/lib/Target/SparcV8/SparcV8InstrInfo.td @@ -206,29 +206,21 @@ def STDri : F3_2<3, 0b000111, // Section B.5 - Store Floating-point Instructions, p. 97 def STFrr : F3_1<3, 0b100100, - (ops MEMrr:$addr, IntRegs:$src), - "st $src, [$addr]", []>; + (ops MEMrr:$addr, FPRegs:$src), + "st $src, [$addr]", + [(store FPRegs:$src, ADDRrr:$addr)]>; def STFri : F3_2<3, 0b100100, - (ops MEMri:$addr, IntRegs:$src), - "st $src, [$addr]", []>; + (ops MEMri:$addr, FPRegs:$src), + "st $src, [$addr]", + [(store FPRegs:$src, ADDRri:$addr)]>; def STDFrr : F3_1<3, 0b100111, - (ops MEMrr:$addr, IntRegs:$src), - "std $src, [$addr]", []>; + (ops MEMrr:$addr, DFPRegs:$src), + "std $src, [$addr]", + [(store DFPRegs:$src, ADDRrr:$addr)]>; def STDFri : F3_2<3, 0b100111, - (ops MEMri:$addr, IntRegs:$src), - "std $src, [$addr]", []>; -def STFSRrr : F3_1<3, 0b100101, - (ops MEMrr:$addr, IntRegs:$src), - "st $src, [$addr]", []>; -def STFSRri : F3_2<3, 0b100101, - (ops MEMri:$addr, IntRegs:$src), - "st $src, [$addr]", []>; -def STDFQrr : F3_1<3, 0b100110, - (ops MEMrr:$addr, IntRegs:$src), - "std $src, [$addr]", []>; -def STDFQri : F3_2<3, 0b100110, - (ops MEMri:$addr, IntRegs:$src), - "std $src, [$addr]", []>; + (ops MEMri:$addr, DFPRegs:$src), + "std $src, [$addr]", + [(store DFPRegs:$src, ADDRri:$addr)]>; // Section B.9 - SETHI Instruction, p. 104 def SETHIi: F2_1<0b100,