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ARM mode version of r109693. Remove incorrect substitution pattern for UXTB16. It wrongly assumed the input shift was actually a rotate. rdar://8240138

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109696 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach
2010-07-28 23:25:44 +00:00
parent 7946494ceb
commit 542f642684
1 changed files with 6 additions and 2 deletions
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8
lib/Target/ARM/ARMInstrInfo.td
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@@ -1567,8 +1567,12 @@ defm UXTH : AI_unary_rrot<0b01101111,
defm UXTB16 : AI_unary_rrot<0b01101100, defm UXTB16 : AI_unary_rrot<0b01101100,
"uxtb16", UnOpFrag<(and node:$Src, 0x00FF00FF)>>; "uxtb16", UnOpFrag<(and node:$Src, 0x00FF00FF)>>;
def : ARMV6Pat<(and (shl GPR:$Src, (i32 8)), 0xFF00FF), // FIXME: This pattern incorrectly assumes the shl operator is a rotate.
(UXTB16r_rot GPR:$Src, 24)>; // The transformation should probably be done as a combiner action
// instead so we can include a check for masking back in the upper
// eight bits of the source into the lower eight bits of the result.
//def : ARMV6Pat<(and (shl GPR:$Src, (i32 8)), 0xFF00FF),
// (UXTB16r_rot GPR:$Src, 24)>;
def : ARMV6Pat<(and (srl GPR:$Src, (i32 8)), 0xFF00FF), def : ARMV6Pat<(and (srl GPR:$Src, (i32 8)), 0xFF00FF),
(UXTB16r_rot GPR:$Src, 8)>; (UXTB16r_rot GPR:$Src, 8)>;