The target description classes require a detailed descriptions of the target +
The target description classes require a detailed description of the target architecture. These target descriptions often have a large amount of common information (e.g., an add instruction is almost identical to a sub instruction). In order to allow the maximum amount of commonality to be factored out, the LLVM code generator uses the TableGen tool to -allow +describe big chunks of the target machine, which allows the use of domain- and +target-specific abstractions to reduce the amount of repetition.